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1. general description the pca8539 is a fully featured liquid crystal display (lcd) 1 driver, specifically designed for high-contrast vertical alignment (va) lcd with multiplex rates up to 1:18. it generates the drive signals for multiplexed lcd containi ng up to 18 backplanes, 100 segments, and up to 1800 elements. the pca8539 features an internal charge pump with internal capacitors for on-chip generation of the lcd driving voltage. to ensure an optimal and stable contrast over the full temperature range, the pca8539 offers a programmable temperature compensation of the lcd supply voltage. the pca8539 can be easily connected to a microcontroller by either the two-line i 2 c-bus or a four-line bidirectional spi-bus. for a selection of nxp lcd graphic drivers, see table 46 on page 81 . 2. features and benefits ? aec q100 grade 2 compliant for automotive applications ? single-chip lcd controller and driver ? extended operating temperature range from ? 40 ? c to +105 ? c ? 100 segments and 18 backplanes allowing to drive any graphic with up to 1800 elements ? on-chip: ? configurable 4, 3, or 2 times voltage multiplier generating lcd supply voltage, independent of v dd , programmable by instruction (external supply also possible) ? integrated temperature sensor with temperature readout ? temperature compensation of on-chip generated vlcdout. selectable linear temperature compensation of v lcd ? generation of intermediate lcd bias voltages ? oscillator requires no external componen ts (external clock also possible) ? readout of ram and registers possible ? diagnostic features: ? checksum on i 2 c and spi bus ? frame frequency: programmable from 45 hz to 360 hz ? 2960-bit ram for storage (1800 bit for display data) ? two-line i 2 c-bus interface or four-line spi bus ? multiplex drive mode 1:18 and 1:12 ? inversion modes ? n-line (n = 1 to 7) inversion pca8539 100 x 18 chip-on-glass autom otive lcd dot matrix driver rev. 1 ? 11 november 2013 product data sheet 1. the definition of the abbreviations and acronyms used in this data sheet can be found in section 20 .
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 2 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver ? frame inversion ? large supply voltage range: v dd1 : 2.5 v to 5.5 v (chip can be driven with battery cells) ? analog supply voltage v dd2 : 2.5 v to 5.5 v ? lcd supply voltage v lcd : 4 v to 16 v ? very low current consumption (20 ? a to 200 ? a): ? power-down mode: < 2 ? a 3. applications ? automotive ? instrument clusters ? climate contro l display ? car entertainment ? car radio ? industrial ? medical and health care ? measuring equipment ? machine control systems ? information boards ? general-purpose display modules ? consumer ? white goods ? home entertainment
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 3 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 4. ordering information 4.1 ordering options 5. marking each die has a laser marking on the rear side. the forma t is lllllllwwxxxxxx having the following meaning: lllllll - wafer lot number ww - wafer number xxxxxx - die identification number table 1. ordering information type number package name description version PCA8539DUG bare die 244 bumps PCA8539DUG table 2. ordering options product type number sales item (12nc) orderable part number ic revision delivery form PCA8539DUG/da 935301519033 PCA8539DUG/daz 1 chips with gold bumps in tray
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 4 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 6. block diagram fig 1. block diagram of pca8539 &+$5*( 3803 9 /&' 5(*8/$725 %,$6 92/7$*( *(1(5$725 6(*0(17 '5,9(5 %$&.3/$1( '5,9(5 7(03(5$785( 6(1625 7,0,0* *(1(5$725 *(1(5$/ 385326( 5$0 ',63/$< 5$0 26&,//$725 &200$1' 5(*,67(5 '(&2'(5 $''5(66 &2817(5 ,17(5)$&(&21752//(5 3&$ 9/&'287 9/&'6(16( 9/&',1 6wr6 &20wr&20 567 777 7 6$ &( 6&/ 6', 6'$,1 6'2 6'$287 ,) 9 '' 9 66 3' 9 '' 9 66 9 66 &/. 26& 3:5287 3:5,1 *(1(5$/ 385326( 5$0 ddd 273
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pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 6 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 7.2 pin description table 3. pin description of PCA8539DUG input or input/output pins must always be at a defined level (v ss or v dd ) unless otherwise specified. symbol pin type description backplane output pins com13 1 to 3 output lcd backplane com14 4, 5 com15 6, 7 com16 8, 9, 232, 233 com17 110, 111, 130, 131 com7 112, 113 com6 114, 115 com5 116 to 118 com4 119 to 121 com3 122, 123 com2 124, 125 com1 126, 127 com0 128, 129 com8 234, 235 com9 236, 237 com10 238, 239 com11 240, 241 com12 242 to 244 segment output pins s99 to s0 132 to 231 output lcd segment driver output v lcd pins vlcdin 10 to 13 supply v lcd input vlcdsense 14 to 16 input v lcd regulation input vlcdout 17 to 20 output v lcd output supply pins vss2 [1] 21 to 30 supply ground supply vss3 [1] 31 to 34 vss1 [1] 35 to 47 vdd1 61 to 65 supply supply voltage 1 vdd2 66 to 73 supply supply voltage 2 pwrout 81, 82 output regulated voltage ou tput; must be connected to pwrin pwrin 83 to 89 input regulated voltage input; must be connected to pwrout test pins t1 48, 49 input not accessible; must be connected to v ss1 t2 50, 51 t4 52 to 54 output not accessible; must be left open
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 7 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver [1] the substrate (rear side of the die) is at v ss1 potential and must not be connected. [2] if pin osc is tied to v ss1 , clk is the output pin of the internal oscillator. if pin osc is tied to v dd1 , clk is the input pin for the external oscillator. t3 76 to 80 input not accessible; must be connected to pwrout oscillator, synchronization, and reset pins osc [2] 55, 56 input clock (internal/external) selector pd 74, 75 input power-down mode select ? for normal operation, pin pd must be low ? for power-down mode, pin pd must be high clk 92 to 94 input/output internal oscillator output, external oscillator input rst 95, 96 input active low reset input bus-related pins spi-bus i 2 c-bus sa0 57, 58 input unused; ? connect to v ss1 slave address selector; ? connect to v ss1 for logic 0 ? connect to v dd1 for logic 1 ifs 59, 60 input interface selector input ? connect to v ss1 interface selector input ? connect to v dd1 ce 90, 91 input chip enable input (active low) unused ? connect to v dd1 sdi/sdain 97 to 99 input spi-bus data input i 2 c-bus serial data input sdo 100, 101 output spi serial data output unused ? must be left open scl 102 to 104 input serial clock input serial clock input sdaout 105 to 109 output unused ? must be connected to v ss1 serial data output table 3. pin description of PCA8539DUG ?continued input or input/output pins must always be at a defined level (v ss or v dd ) unless otherwise specified. symbol pin type description
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 8 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8. functional description 8.1 commands of pca8539 the commands defined in ta b l e 5 control the pca8539. the sequence to execute a command is like shown in ta b l e 4 : [1] more about the slave address, see section 9.2.7 . [2] see section 9.2.7 and section 9.3.1 . [3] see section 9.1 . [4] more about the subaddress, see section 9.3.1 . remark: any other combinations of operation code bits that are not mentioned in this document can lead to undesired operation modes of pca8539. table 4. command execution sequence bus byte 1 byte 2 byte 3 i 2 c slave address [1] + r/w [2] co + rs[1:0] [3] command spi r/w [2] + subaddress [4] co + rs[1:0] [3] command table 5. commands of pca8539 bit positions labeled as - are not implem ented have to be always written with 0. command name r/w command select bits reference rs[1:0] 7 6 5 4 3 2 1 0 general control commands initialize 0000 0 0 0 0 0 0 1 section 8.1.1.1 clear_reset_flag 0000 0 0 1 1 1 1 1 section 8.1.1.2 otp_refresh 0000 0 0 0 0 0 1 0 section 8.1.1.3 clock_out_ctrl 0000 0 1 0 0 0 0 coe section 8.1.1.4 read_reg_select 0000 0 0 0 0 1 xcso section 8.1.1.5 read_status_reg 100td[7:0] section 8.1.1.6 cs[7:0] status_register_1 to status_register_9 graphic_mode_cfg0000 1 0 1 0 gmx- - section 8.1.1.7 sel_mem_bank 0000 0 0 1 0 smb[2:0] section 8.1.1.8 set_mem_addr 0001 add[6:0] section 8.1.1.9 read_data 1 0 1 rd[7:0] section 8.1.1.10 000rd[4:0] write_data 001wd[7:0] section 8.1.1.11 000wd[4:0] display control commands entry_mode_set 0100 0 1 0 1 0 i_d- section 8.1.2.1 inversion_mode 0100 1 0 0 0 inv[2:0] section 8.1.2.2 frame_frequency 0101 0 0 ff[4:0] section 8.1.2.3 display_control 0100 0 1 0 0 d - - section 8.1.2.4
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 9 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.1 general control commands 8.1.1.1 command: initialize this command generates a chip-wide reset by setting all command registers to their default values. it must be sent to the pca8 539 after power-on. for further information, see section 8.2.1 on page 22 . 8.1.1.2 command: clear_reset_flag the clear_reset_flag command clears the reset flag crf, see table 11 on page 11 . 8.1.1.3 command: otp_refresh in order to achieve the specified accuracy of the v lcd , the frame frequency, and the temperature measurement, each ic is calib rated during production. these calibration values are stored in one time programmable (otp) cells. their content is loaded into the associated registers every time when the initialize command or the otp_refresh command is sent. this command takes approximately 10 ms to finish. display_config 0100 0 0 0 0 1 p - section 8.1.2.5 charge pump and lcd bias control commands charge_pump_ctrl 0111 0 0 0 0 cpecpc[1:0] section 8.1.3.1 set_vlcd 0111 0 1 vlcd[8:4] section 8.1.3.2 0111 0 0 1 vlcd[3:0] temperature compensation control commands temperature_ctrl 0110 0 0 0 0 tcetmftme section 8.1.4.1 tc_slope 0110 0 0 0 1 tsa[2:0] section 8.1.4.2 0110 0 0 1 0 tsb[2:0] 0110 0 0 1 1 tsc[2:0] 0110 0 1 0 0 tsd[2:0] table 5. commands of pca8539 ?continued bit positions labeled as - are not implem ented have to be always written with 0. command name r/w command select bits reference rs[1:0] 7 6 5 4 3 2 1 0 table 6. initialize - initialize command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 0 - 00000001 initialize table 7. clear_reset_flag - clear_r eset_flag command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 0 - 00011111 clear reset status flag
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 10 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.1.4 command: clock_out_ctrl when pin clk is configured as an output pin, the clock_out_ctrl command enables or disables the clock output on pin clk. [1] default value. for lower power consumption, the cloc k is only active when display (see table 21 ), charge pump (see ta b l e 2 3 ), or temperature measurement (see table 25 ) is enabled. 8.1.1.5 command: read_reg_select the read_reg_select command allows choosing to read out the temperature or the status registers checksum to status_reg ister_9 of the device (see ta b l e 11 ). [1] default value. 8.1.1.6 command: read_status_reg with the read_status_reg command the temper ature, checksum, and the status registers can be read out. the behavior of the read_status_reg command is controlled by the so bit of the read_reg_select command (see ta b l e 1 0 ). table 8. otp_refresh - otp_refresh command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 0 - 00000010 refresh register settings from otp table 9. clock_out_ctrl - clk pin input/ output switch command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 1 - 0010000 fixed value 0coe clk pin setting 0 [1] clock signal not available on pin clk; pin clk is in 3-state 1 clock signal available on pin clk table 10. read_reg_select - sel ect registers for readout command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 2 - 000001 fixed value 1xc checksum mode setting 0 [1] xor checksum 1 crc-8 checksum 0so readout select 0 [1] temperature 1 status registers
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 11 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver table 11. read_status_reg - readout register command bit description bit symbol value description -r/w 1 fixed value - rs[1:0] 00 fixed value temperature readout if so = 0 (see table 10 ) 7 to 0 td[7:0] 00000000 to 11111111 [1] temperature readout status readout if so = 1 (see table 10 ) checksum 7 to 0 cs[7:0] 00000000 [1] to 11111111 checksum result from ram writing with checksum mode set by bit xc (see ta b l e 1 0 ) status_register_1 7 - 0 fixed value 6gmx multiplex drive mode setting status 5, 4 - 00 fixed value 3 i_d see ta b l e 1 7 address stepping select status 2 to 0 - 000 fixed value status_register_2 7 to 5 inv[2:0] see ta b l e 1 8 inversion mode setting status 4 to 0 ff[4:0] see ta b l e 2 0 frame frequency setting status status_register_3 7 d see ta b l e 2 1 display setting status 6 to 2 - 00000 fixed value 1 p see ta b l e 2 2 display segment setting status 0 - 0 fixed value status_register_4 7 to 5 - 000 fixed value 4 cpe see ta b l e 2 3 charge pump setting status 3 - 0 fixed value 2, 1 cpc[1:0] see ta b l e 2 3 charge pump voltage multiplier setting status 0 vlcd8 see ta b l e 2 4 v lcd values setting status_register_5 7 to 0 vlcd[7:0] see ta b l e 2 4 v lcd values setting status_register_6 7 tce see ta b l e 2 5 temperature compensation setting status 6tmf temperature measurement filter setting status 5 to 3 tsa[2:0] see ta b l e 2 6 temperature compensation slope a setting status 2 to 0 tsb[2:0] temperature compensation slope b setting status status_register_7 7 tme see ta b l e 2 5 temperature measurement setting status
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 12 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver [1] start-up value. 8.1.1.7 command: graphic_mode_cfg the graphic_mode_cfg command allows setting the multiplex drive mode. [1] default value. [2] not implemented, have to be always written with 0. 6 to 4 tsc[2:0] see ta b l e 2 6 temperature compensation slope c setting status 3 to 1 tsd[2:0] temperature compensation slope d setting status 0 - 0 fixed value status_register_8 7 to 0 - 00000000 fixed value status_register_9 7 to 3 - 00000 fixed value 2qpr charge pump charge status 0 charge pump has not reached programmed value 1 charge pump has reached programmed value 1crf reset flag status the reset flag is set whene ver a reset occurs; it should be cleared for reset monitoring (see ta b l e 7 ) 0 no reset has occurred since the reset flag register was cleared last time 1 [1] reset has occurred since the reset flag register was cleared last time 0 coe see ta b l e 9 clk pin setting status table 11. read_status_reg - readout register command bit description ?continued bit symbol value description table 12. graphic_mode_cfg - graphi c mode command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 3 - 01010 fixed value 2gmx multiplex drive mode setting 0 1:18 multiplex drive mode 1 [1] 1:12 multiplex drive mode 1, 0 - - - [2] not implemented
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 13 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.1.8 command: sel_mem_bank the sel_mem_bank command determines which ram to access. [1] default value. 8.1.1.9 command : set_mem_addr the set_mem_addr command allows setting the ram address in the address counter to access. the sel_mem_bank command (see section 8.1.1.8 ) determines whether to access the display ram or the general-purpose ram. [1] default value. 8.1.1.10 command: read_data the read_data command reads binary 8-bit data from the display ram or general-purpose ram. table 13. sel_mem_bank - ram access configuration command bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 to 3 - 00010 fixed value 2 to 0 smb[2:0] ram access select 000 [1] general-purpose ram 1 is selected 001 display data ram bank 1 is selected 010 display data ram bank 2 is selected 011 display data ram bank 3 is selected 100 general-purpose ram 2 is selected 101 to 111 not implemented table 14. set_mem_addr - memory address command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 00 fixed value 7 - 1 fixed value 6 to 0 add[6:0] 0000000 [1] to 1111111 ram address table 15. read_data - data read bit description bit symbol value description -r/w 1 fixed value - rs[1:0] 01 fixed value general-purpose ram 1 7 to 0 rd[7:0] 00000000 to 11111111 read data from general-purpose ram 1 display ram bank 1 to 3, general-purpose ram 2 7 to 5 - 000 fixed value 4 to 0 rd[4:0] 00000 to 11111 read data from display ram bank 1 to 3 and general-purpose ram 2
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 14 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver the sel_mem_bank command (see section 8.1.1.8 ) determines whether to read from the display ram or general-purpose ram. after reading, the address counter automatically increments or decrements by 1 in accordance with the setting of bit i_d of the entry_mode_set command (see section 8.1.2.1 ). only bit 4 to bit 0 of the display ram or the general-purpose ram 2 data are valid. bit 7 to bit 5 are set logic 0. 8.1.1.11 command: write_data the write_data command writes binary 8-bit da ta to the display ram or general-purpose ram. the sel_mem_bank command (see section 8.1.1.8 ) determines whether to write data into the display ram or general-purpose ram. after writing, the address counter automatically increments or decrements by 1 in accordance with the setting of bit i_d of the entry_mode_set command (see section 8.1.2.1 ). only bit 4 to bit 0 of the display ram or the general-purpose ram 2 data are valid. bit 7 to bit 5 are not implemented and should always be logic 0. table 16. write_data - data write bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 01 fixed value general-purpose ram 1 7 to 0 wd[7:0] 00000000 to 11111111 write data to general-purpose ram 1 display ram bank 1 to 3, general-purpose ram 2 7 to 5 - 000 not implemented 4 to 0 wd[4:0] 00000 to 11111 write data to the display ram bank 1 to 3 and general-purpose ram 2
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 15 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.2 display control commands 8.1.2.1 command: entry_mode_set the entry_mode_set command sets the address stepping. [1] default value. [2] not implemented, have to be always written with 0. bit i_d: when bit i_d = 1, the display ram or general-purpose ram address increments by 1 when data is written into or read from the display ram or general-purpose ram. when bit i_d = 0 the display ram or general-purpose ram address decrements by 1 when data is written into or read from the display ram or general-purpose ram. 8.1.2.2 command: inversion_mode the inversion_mode command allows changing the drive scheme inversion mode. the waveforms used to drive an lcd (see figure 24 and figure 25 ) inherently produce a dc voltage across the display cell. the pca8539 comp ensates for the dc voltage by inverting the waveforms on alternate frames or alternate lines. the choice of the compensation method is determined with inv[2:0] in ta b l e 1 8 . [1] default value. table 17. entry_mode_set - entry mode bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 10 fixed value 7 to 2 - 001010 fixed value 1i_d address stepping select 0 display ram or general-purpose ram address decrements by 1 1 [1] display ram or general-purpose ram address increments by 1 0- - [2] not implemented table 18. inversion_mode - inversion mode command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 10 fixed value 7 to 3 - 01000 fixed value 2 to 0 inv[2:0] inversion mode setting 000 [1] frame inversion mode 001 1-line inversion mode 010 2-line inversion mode 011 3-line inversion mode 100 4-line inversion mode 101 5-line inversion mode 110 6-line inversion mode 111 7-line inversion mode
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 16 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver line inversion mode (driving scheme a): in line inversion mode, the dc value is compensated every n th line. changing the inversion mode to line inversion mode reduces the possibility for flickering but increases the power consumption. frame inversion mode (driving scheme b): in frame inversion mode, the dc value is compensated across two frames and not within one frame. changing the inversion mode to frame inversion reduces the power consumption, therefore it is useful when power consumption is a key point in the application. frame inversion may not be suitable for all applications. the rms voltage across a segment is better defined, however since the s witching frequency is reduced there is the possibility for flicker to occur. 8.1.2.3 command: frame_frequency with this command, the clock and frame frequency can be programmed when using the internal clock. the duty cycle depends on the frequency chosen (see ta b l e 2 0 ). the frame_frequency command allows configuring the frame frequency and the clock frequency. the default frame frequen cy of 80 hz is factory calibrated. table 19. frame-frequency - frame freque ncy select command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 10 fixed value 7 to 5 - 100 fixed value 4 to 0 ff[4:0] see ta b l e 2 0 frame frequency setting
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 17 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver [1] default value. 8.1.2.4 command: display_control with the display_control command, the display can be switched on or off. [1] default value. [2] not implemented, have to be always written with 0. table 20. clock and frame frequency values duty cycle definition: % high-le vel time : % low-level time. ff[4:0] frame frequency (hz) clock frequency (hz) typical duty cycle (%) 00000 45 36000 50 : 50 00001 50 39724 44 : 56 00010 55 44308 38 : 62 00011 60 48000 33 : 67 00100 65 52364 27 : 73 00101 70 54857 23 : 77 00110 75 60632 15 : 85 00111 [1] 80 64000 11 : 89 01000 85 67765 5 : 95 01001 90 72000 50 : 50 01010 95 76800 46 : 54 01011 100 82286 42 : 58 01100 110 88615 38 : 62 01101 120 96000 33 : 67 01110 130 104727 27 : 73 01111 145 115200 20 : 80 10000 160 128000 11 : 89 10001 180 144000 50 : 50 10010 210 164571 42 : 58 10011 240 192000 33 : 67 10100 290 230400 20 : 80 10101 to 11111 360 288000 50 : 50 table 21. display_control - disp lay control bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 10 fixed value 7 to 3 - 00100 fixed value 2d display setting 0 [1] display is off 1 display is on 1, 0 - - - [2] not implemented
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 18 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.2.5 command: display_config the display_config command allows se tting how the data is displayed. [1] default value. [2] not implemented, have to be always written with 0. bit p: the p bit is used to flip the display left to right by mirroring the segment data. table 22. display_config - displa y configuration bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 10 fixed value 7 to 2 - 000001 fixed value 1p display segment setting 0 [1] segment data: left to right; segment data is displayed from segment 0 to segment 99 1 segment data: right to left; segment data is displayed from segment 99 to segment 0 0- - [2] fixed value fig 3. illustration of the display configuration bit p %lw3 %lw3 ddd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 19 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.3 charge pump and lcd bias control commands 8.1.3.1 command: charge_pump_ctrl the charge_pump_ctrl command enables or disables the internal v lcd generation and controls the charge pump voltage multiplier setting. [1] default value. 8.1.3.2 command: set_vlcd the set_vlcd command allows programming the v lcd value. the generated v lcd is independent of the power supply, allowing battery operation of the pca8539. [1] default value. table 23. charge_pump_ctrl - charge pump control command bit description bit symbol binary value description -r/w 0 fixed value - rs[1:0] 11 fixed value 7 to 3 - 10000 fixed value 2cpe charge pump setting 0 [1] charge pump disabled; no internal v lcd generation; external supply of v lcd 1 charge pump enabled 1 to 0 cpc[2:0] charge pump voltage multiplier setting 00 [1] v lcd = 2 ? v dd2 01 v lcd = 3 ? v dd2 10 v lcd = 4 ? v dd2 11 v lcd = v dd2 (direct mode) table 24. set_vlcd - set-v lcd command bit description bit symbol value description the 5 msb of vlcd -r/w 0 fixed value - rs[1:0] 11 fixed value 7 to 5 - 101 fixed value 4 to 0 vlcd[8:4] 00000 [1] to 11111 v lcd value the 4 lsb of vlcd -r/w 0 fixed value - rs[1:0] 11 fixed value 7 to 4 - 1001 fixed value 3 to 0 vlcd[3:0] 0000 [1] to 1111 v lcd value
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 20 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.4 temperature compensation control commands 8.1.4.1 command: temperature_ctrl the temperature_ctrl command enables or disables the temperature measurement block and the temperature compensation of v lcd (see section 8.4.5 ). [1] default value. [2] the unfiltered digital value of td[7:0] is immediately available for the readout and v lcd compensation. table 25. temperature_ctrl - temperature measurement control command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 11 fixed value 7 to 3 - 00000 fixed value 2tce temperature compensation setting 0 [1] temperature compensation of v lcd disabled 1 temperature compensation of v lcd enabled 1tmf temperature measurement filter setting 0 [1] digital temperature filter disabled [2] 1 digital temperature filter enabled 0tme temperature measurement setting 0 [1] temperature measurement disabled; no temperature readout possible 1 temperature measurement enabled; temperature readout possible
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 21 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.1.4.2 command: tc_slope the tc_slope command allows setting the temperature coefficients of v lcd corresponding to 4 temperature intervals. [1] default value. [2] see table 28 on page 37 . table 26. tc_slope - v lcd temperature compensation slope command bit description bit symbol value description -r/w 0 fixed value - rs[1:0] 11 fixed value tc-slope-a 7 to 3 - 00001 fixed value 2 to 0 tsa[2:0] 000 [1] to 111 temperature factor a setting [2] tc-slope-b 7 to 3 - 00010 fixed value 2 to 0 tsb[2:0] 000 [1] to 111 temperature factor b setting [2] tc-slope-c 7 to 3 - 00011 fixed value 2 to 0 tsc[2:0] 000 [1] to 111 temperature factor c setting [2] tc-slope-d 7 to 3 - 00100 fixed value 2 to 0 tsd[2:0] 000 [1] to 111 temperature factor d setting [2]
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 22 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.2 start-up and shut-down 8.2.1 initialization the first command sent to the device after power-on or a reset by using the rst pin must be the initialize command (see section 8.1.1.1 on page 9 ). the initialize command resets the pca85 39 to the following starting conditions: 1. all backplane and segment driver outputs are set to v ss1 . 2. selected drive mode is 1:18 multiplex driving mode. 3. the address counter is cleared (set logic 0). 4. temperature measurement is disabled. 5. temperature filter is disabled. 6. the internal v lcd voltage generation is disabled. the charge pump is switched off. 7. the v lcd temperature compensation is disabled. 8. the display is disabled. the reset state is as shown in ta b l e 2 7 . a code example of the initialization is given in section 19.1 . table 27. reset state of pca8539 command name bits 7 6 5 4 3 2 1 0 general control commands clock_out_ctrl 00100000 read_reg_select 00000100 graphic_mode_cfg 00001000 sel_mem_bank 00010000 set_mem_addr 10000000 display control commands entry_mode_set 00101010 inversion_mode 01000000 frame_frequency 10000111 display_control 00100000 display_config 00000100 charge pump and lcd bias control commands charge_pump_ctrl 10000000 set_vlcd 10100000 10010000 temperature compensation control commands temperature_ctrl 00000000 tc_slope 00001000 00010000 00011000 00100000
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 23 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver remarks: 1. do not transfer data for at least 1 ms after a power-on. 2. after power-on and before enabling the display, the display ram content must be brought to a defined status by writing meaningful display content (for example, a graphic) otherwise unwanted display artifacts may appear on the display. 8.2.2 reset pin function the reset pin (rst ) of the pca8539 resets all the registers to their default state. the reset state is given in ta b l e 2 7 . the ram contents remain unchanged. after the reset signal is released, the initialize command must be sent to complete th e initialization of the chip. 8.2.3 power-down pin function when connected to v dd1 , the internal circuits are switched off, leaving only 2 ? a (typical) as an overall current consumption. when connected to v ss1 , the pca8539 runs or starts up to normal mode again. for the start-up and power-down sequences, see section 8.2.4 and section 8.2.5 . 8.2.4 recommended start-up sequences this section describes how to proceed with the initialization of the chip in different application modes.
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 24 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver when using the internal v lcd generation, the display must not be enabled before the generation of v lcd with the internal charge pump is completed. otherwise unwanted display artifacts may appear on the display. (1) the qpr flag (see table 11 ) indicates if the programmed lcd voltage value was reached. the latency time depends on the external capacitor on the v lcd pins. for a capacitor of 100 nf a delay of 50 ms to 60 ms is expected. fig 4. recommended start-up sequence when using the internal charge pump and the internal clock signal fig 5. recommended start-up sequence when using an externally supplied v lcd and the internal clock signal :dlwpv 67$57 ,qlwldol]h frppdqg ddd 6hwwkh ghvluhg9 /&' ydoxh :dlwwlo o 9 /&' uhdfkhv surjudpphg ydoxh :ulwh5$ 0 frqwhqwwreh glvsod\hgdqg hqdeohwkh glvsod\ 6723 3rzhurq 9 '' dqg 9 '' dwwkh vdphwlph 3'slq frqqhfwhgwr 9 66 6hw pxowlsolfdwlrq idfwruiru fkdujhsxps dqghqdeohlw :dlwpv ,qlwldol]h frppdqg 67$57 ddd :ulwh5$ 0 frqwhqwwreh glvsod\hgdqg hqdeohwkh glvsod\ 6723 3rzhurq 9 '' dqg 9 '' dwwkh vdphwlph 3'slq frqqhfwhgwr 9 66
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 25 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver (1) alternatively, the external clock signal can be applied after the generation of the v lcd voltage. (2) the qpr flag (see table 11 ) indicates if the programmed lcd voltage value was reached. the latency time depends on the external capacitor on the v lcd pins. for a capacitor of 100 nf a delay of 50 ms to 60 ms is expected. fig 6. recommended start-up sequence when using the internal charge pump and an external clock signal fig 7. recommended start-up sequence when using an externally supplied v lcd and an external clock signal :dlwpv 67$57 ,qlwldol]h frppdqg ddd 6hwwkh ghvluhg9 /&' ydoxh :dlwwloo 9 /&' uhdfkhv surjudpphg ydoxh :ulwh5$0 frqwhqwwreh glvsod\hgdqg hqdeohwkh glvsod\ 6723 $sso\h[whuqdo forfnvljqdo wrslq&/. 6hw pxowlsolfdwlrq idfwruiru fkdujhsxps dqghqdeohlw 3rzhurq 9 '' dqg 9 '' dwwkh vdphwlph 3'slq frqqhfwhgwr 9 66 :dlwpv ,qlwldol]h frppdqg $sso\h[whuqdo forfnvljqdo wrslq&/. 67$57 ddd :ulwh5$ 0 frqwhqwwreh glvsod\hgdqg hqdeohwkh glvsod\ 6723 3rzhurq 9 '' dqg 9 '' dwwkh vdphwlph 3'slq frqqhfwhgwr 9 66
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 26 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.2.5 recommended power-down sequences with the following sequences, the pca8539 can be set to a state of minimum power consumption, called power-down mode. (1) if previously enabled. remark: when bits d ( table 21 on page 17 ), cpe ( table 23 on page 19 ), and tme ( table 25 on page 20 ) are logic 0, the internal clock signal is switched off. fig 8. recommended power-down sequence for minimum power-do wn current when using the internal charge pump and the internal clock signal 'lvdeohglvsod\ e\vhwwlqj elw'orjlf 67$57 6723 6wrsjhqhudwlrq ri9 /&' e\vhwwlqjelw &3(orjlf 'lvdeoh whpshudwxuh phdvxuhphqw e\vhwwlqjelw 70(orjlf (qwhu srzhugrzq prghe\ dsso\lqjd +,*+ohyho wr3'slq ddd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 27 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver the chip can be put into power-down mode by applying a high-level to pin pd. in power-down mode, all stat ic currents are switched off (no in ternal oscillator, no bias level generation and all lcd outputs are internally connected to v ss ). during power-down, information in the ram and the chip state are not preserved. instruction execution during power-down is not possible. (1) if previously enabled. remark: when bits d ( table 21 on page 17 ), cpe ( table 23 on page 19 ), and tme ( table 25 on page 20 ) are logic 0, the internal clock signal is switched off. fig 9. recommended power-down sequence when using an externally supplied v lcd and the internal clock signal 'lvdeohglvsod\ e\vhwwlqj elw'orjlf 67$57 6723 'lvdeoh whpshudwxuh phdvxuhphqw e\vhwwlqjelw 70(orjlf (qwhu srzhugrzq prghe\ dsso\lqjd +,*+ohyho wr3'slq ddd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 28 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver remarks: 1. it is necessary to run the power-down sequence before removing the supplies. depending on the application, care must be taken that no other signals are present at the chip input or output pins when removing the supplies (refer to section 10 on page 59 ). otherwise this may cause unwanted display artifacts. uncontrolled removal of supply voltages does not damage the pca8539. (1) if previously enabled. fig 10. recommended power-down sequence when using the internal charge pump and an external clock signal (1) if previously enabled. fig 11. recommended power-down sequence when using an externally supplied v lcd and an external clock signal 67$57 ddd 6723 (qwhu srzhugrzq prghe\ dsso\lqjd +,*+ohyho wr3'slq 'lvdeohglvsod\ e\vhwwlqj elw'orjlf 6wrsjhqhudwlrq ri9 /&' e\vhwwlqjelw &3(orjlf 6wrsvxsso\ riwkhh[whuqdo forfnwr slq&/. 'lvdeoh whpshudwxuh phdvxuhphqw e\vhwwlqjelw 70(orjlf 67$57 ddd 6723 (qwhu srzhugrzq prghe\ dsso\lqjd +,*+ohyho wr3'slq 'lvdeohglvsod\ e\vhwwlqj elw'orjlf 6wrsvxsso\ riwkhh[whuqdo forfnwr slq&/. 'lvdeoh whpshudwxuh phdvxuhphqw e\vhwwlqjelw 70(orjlf
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 29 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 2. static voltages across the liquid crystal display can build up when the external lcd supply voltage (v lcd ) is on while the ic supply voltage (v dd1 and v dd2 ) is off, or the other way round. this may cause unwanted display artifacts. to avoid such artifacts, external v lcd , v dd1 , and v dd2 must be applied or removed together. 3. a clock signal must always be supplied to the device when the device is active. removing the clock may freeze the lcd in a dc state, which is not suitable for the liquid crystal. disable the display first and then remove the clock signal afterwards. 8.3 possible display configurations the pca8539 is a versatile peripheral device designed to interface between any microcontroller to a wide variety of lcd dot-matrix displays (see figure 12 ). the host microcontroller maintains the commu nication channel with the pca8539. the only other connections required to complete the system are the power supplies (vdd1, vdd2 and vss1 to vss3), the v lcd pins (vlcdout, vlcdsense, vlcdin), the external capacitors, and the lcd panel selected for the application. the appropriate biasing voltages for the multiplexed lcd waveforms are generated internally. external capacitors of 100 nf minimum are re quired on each of the pins vdd1 and vdd2. vdd1 and vdd2 can be connected to the same power supply. in this case, a capacitor of 300 nf minimum is required. vss1 to vss3 can be connected to the same ground supply. the vlcd pins (vlcdout, vlcdsense, vl cdin) can be connected, whether v lcd is generated internally or supplied from external. an external capacitor of 300 nf minimum is recommended for vlcd. for high display loads, 1 ? f is suggested. fig 12. pca8539 connected to a dot-matr ix lcd (multiplex drive mode 1:12) 3&$ &20wr&20 6wr6 ddd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 30 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver v dd1 and v dd2 from 2.5 v to 5.5 v. values for t r and c b , see ta b l e 4 0 . v dd1 and v dd2 can be connected to the same power supply. v ss1 to v ss3 can be connected to the same ground supply. fig 13. typical system configuration if using the internal v lcd generation and i 2 c-bus ddd 5? w u & e +267 0,&52 352&(6625 ,)6 9 '' 9'' 9/&'287 9/&'6(16( 9/&',1 vhjphqwv 6$ 966 9 66 9 66 966 966 edfnsodqhv 6',6'$,1 6'$287 6&/ /&'3 $1(/ 9 '' 9 66 3&$ v dd1 and v dd2 from 2.5 v to 5.5 v. fig 14. typical system configuration if using the external v lcd and spi-bus &( ddd +267 0,&52 352&(6625 6&/ 9'' 9'' 9/&'2879/&'6(16( 9/&',1 9 /&' vhjphqwv 6'$287 6$ 966 966 edfnsodqhv 6',6'$,1 6'2 /&'3 $1(/ 9 '' 9 66 ,)6 966 3&$
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 31 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.4 lcd voltage 8.4.1 v lcd pins the pca8539 has 3 v lcd pins: vlcdin ? v lcd supply input vlcdout ? v lcd voltage output vlcdsense ? v lcd regulation circuitry input the v lcd voltage can be generated on-chip or externally supplied. 8.4.2 external v lcd supply when the external v lcd supply is selected, the v lcd voltage must be supplied to the pin vlcdin. the pins vlcdout a nd vlcdsense can be left unconnected or alternatively connected to vlcdin. the v lcd voltage is available at the row and column drives of the device through the chosen bias system. the internal charge pump must not be enable d, otherwise high internal currents may flow as well as high currents via pin vdd2 and pin vlcdout. no internal temperature compensation occurs on the externally supplied v lcd even if bit tce is set logic 1 (see section 8.1.4.1 ). also programming vlcd[8:0] has no effect on the externally supplied v lcd . 8.4.3 internal v lcd generation when the internal v lcd generation is selected, the v lcd voltage is available on pin vlcdout. the pins vlcdin and vlcdsense mu st be connected to the pin vlcdout. the charge_pump_ctrl command (see table 23 on page 19 ) controls the charge pump. it can be enabled with the cpe bit. the mult iplier setting can be configured with the cpc[1:0] bits. the charge pump can generate a v lcd up to 4 ? v dd2 . 8.4.3.1 v lcd programming v lcd can be programmed with the bit-field vlcd[8:0]. the final value of v lcd is a combination of the programmed vlcd[8:0] value and in addition the output of the temperature compensation block. the system is exemplified in figure 15 .
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 32 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver equation 1 to equation 3 exemplify the v lcd generation with temperature compensation. (1) (2) (3) 1. vlcd is the decimal value of the programmed vlcd factor (vlcd[8:0]). 2. vt is the binary value of the calculated temperature compensating factor (vt[8:0]) of the temperature compensation block (see ta b l e 2 9 ). the temperature compensation block provides the value which is a two?s complement with the value of 0h at 20 ? c. figure 16 shows how the v lcd changes with the programmed value of vlcd[8:0]. fig 15. v lcd generation including temperature compensation ddd 76$ 76% 76& 76' 7(03(5$785( &203(16$7,21 7(0 3(5$785( 0 ($685(0(17 7'>@ 97>@ 9 /&' 9 riivhw/ &' 9/&'>@ 9 surj/&' v prog lcd ?? vlcd 0.03 v 4 v + ? = v offset lcd ?? vt 0.03 v ? = v lcd v prog lcd ?? v offset lcd ?? + vlcd 0.03 v 4 v vt 0.03 v ? ++ ? ==
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 33 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver remarks: 1. vlcd[8:0] has to be set to su ch a value that the resultant v lcd , including the temperature compensation, is higher than v dd2 . 2. the programmable range of vlcd[8:0] is fr om 0h to 1ffh. this would allow achieving a v lcd of higher voltages but the pca8539 has a built-in automatic limitation set to 16 v. 8.4.4 v lcd drive capability figure 17 to figure 19 illustrate the drive capability of t he internal charge pump for various conditions. v lcd is internally limited to 16 v. (1) vlcd[8:0] must be set so that v lcd > v dd2 . (2) automatic limitation for v lcd > 16 v. fig 16. v lcd programming of pca8539 (assuming vt[8:0] = 0h) ddd 9 /&' 9 '' 9/&'>@ ))k )kk k 9 9 k k k k k k 9
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 34 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver conditions: v dd2 = 2.5 v; v lcd =8v; t amb =25 ? c; r ito(vss2) , r ito(vdd2) , r ito(vlcdout) =50 ? . (1) v lcd =2 ? v dd2 . (2) v lcd =3 ? v dd2 . (3) v lcd =4 ? v dd2 . i load is the overall current sink of the column and row outputs depending on the display, plus the on-chip v lcd current consumption. fig 17. v lcd with respect to i load at v dd2 =2.5v conditions: v dd2 =5v; v lcd =8v; t amb =25 ? c; r ito(vss2) , r ito(vdd2) , r ito(vlcdout) =50 ? . (1) v lcd =2 ? v dd2 . (2) v lcd =3 ? v dd2 . (3) v lcd =4 ? v dd2 . i load is the overall current sink of the column and row outputs depending on the display, plus the on-chip v lcd current consumption. fig 18. v lcd with respect to i load at v dd2 =5v ddd , ordg p$ 9 /&' /&' 9 /&' 9 9 9 ddd , ordg p$ 9 /&' /&' 9 /&' 9 9 9
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 35 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.4.5 temperature measurement and temperature compensation of v lcd 8.4.5.1 temperature readout the pca8539 has a built-in temperature sensor which provides an 8-bit digital value (td[7:0]) of the ambient temperature. this value can be read by command (see section 8.1.1.5 on page 10 ). the actual temperature is determined from td[7:0] using equation 4 . (4) td[7:0] = ffh means that no temperature readout is available or was performed. ffh is the default value after initializ ation. the measurement needs about 8 ms to complete. it is repeated periodically every second as long as bit tme is set logic 1 (see table 25 on page 20 ). due to the nature of a temperature sensor, oscillations ma y occur. to avoid this, a filter has been implemented in pca8539. a control bit, tmf, is implemented to enable or disable the digital temperature filter (see table 25 on page 20 ). the system is exemplified in figure 20 . conditions: v dd2 =5v; v lcd =16v; t amb =25 ? c; r ito(vss2) , r ito(vdd2) , r ito(vlcdout) =50 ? . (1) v lcd =2 ? v dd2 . (2) v lcd =3 ? v dd2 . (3) v lcd =4 ? v dd2 . i load is the overall current sink of the column and row outputs depending on the display, plus the on-chip v lcd current consumption. fig 19. v lcd with respect to i load at v dd2 =5v ddd , ordg p$ 9 /&' /&' 9 /&' 9 9 9 t ? c ?? 0.6275 td 40 ? ? =
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 36 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver the digital temperature filter introduces a certain delay in the measurement of the temperature. th is behavior is illustrated in figure 21 . 8.4.5.2 temperature adjustment of the v lcd due to the temperature dependency of the liquid crystal viscosity, the lcd supply voltage may have to be adjusted at different temperatures to maintain optimal contrast. the temperature characterist ics of the liquid are provided by the lcd manufacturer. the slope has to be set to compensate for the liquid behavior. internal temperature compensation can be enabled via bit tce (see table 25 on page 20 ). the ambient temperature range is split up into 4 regions (see figure 22 ) and to each a different temperature coefficient can be applied. fig 20. temperature measurement block with digital temperature filter (1) environment temperature, t1 ( ? c). (2) measured temperature, t2 ( ? c). (3) measurement temperature variation, ? t meas =t2 ? t1. fig 21. temperature measurement delay 7(03(5$785( 0($685(0(17 %/2&. ',*,7$/ 7(03(5$785( ),/7(5 7'>@ xqilowhuhg 7'>@ ilowhuhg hqdeohgruglvdeohg e\elw70) 7rwkhuhdgrxwuhj lvwhu dqgwrwkh9 /&' frpshqvdwlrqeorfn ddd wv ddd 7 ?& 7 phdv ?&
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 37 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver the temperature coefficients can be selected fr om a choice of eight different slopes. each one of theses coefficients is independent ly selected via the tc_slope command (see section 8.1.4.2 on page 21 ). [1] the relationship between the temperature coefficient s tsa to tsd and the slope factor is derived from equation 5 . where lsb of vlcd[8:0] ? 30 mv. [2] default value. (5) the value of the temperature compensated factor vt[8:0] is calculated according to ta b l e 2 9 . fig 22. example of segmented temperature coefficients table 28. temperature coefficients tsa[2:0] to tsd[2:0] value slope factor (mv/ ?c) temperature factor tsa to tsd [1] 000 [2] 00 . 0 0 0 001 ? 6 ? 0.125 010 ? 12 ? 0.250 011 ? 24 ? 0.500 100 ? 60 ? 1.250 101 +6 +0.125 110 +12 +0.250 111 +24 +0.500 ddd 76$ 76% 76& 76' k k k ]hurriivhw dw?& )k ()k $%&' whpshudwxuh?& 7'>@ 9 /&' zlwk whpshudwxuh frpshqvdwlrq 9 tsn 0.6275 ? c ?? 30 (mv) --------------------------- - slope factor (mv/ ? c ? ? =
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 38 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver [1] no temperature compensation is possible above 105 ? c. above this value, the system maintains the compensation value from 105 ? c. 8.4.5.3 example calculation of v offset(lcd) assumed that t amb = ? 8 ? c 1. choose a temperature factor from ta b l e 2 8 , for example tsb[2:0] = 001, which gives a temperature factor of ? 0.125. 2. calculate the decimal value of td[7:0] with equation 4 : . 3. calculate the temperature compensating fact or vt with the appropriate equation from ta b l e 2 9 : . 4. calculate v offset(lcd) with equation 2 : . 8.4.6 lcd bias voltage generator the intermediate bias voltages for the lcd are generated on-chip. this removes the need for an external resistive bias chain and significantly reduces the system current consumption. the optimum value of v lcd depends on the multiplex rate, the lcd threshold voltage (v th ) and the number of bias levels. the intermediate bias levels for the different multiplex rates are shown in table 30 . these bias levels are automatically set to the given values when switching to the corresponding multiplex rate. the rms on-state voltage (v on(rms) ) for the lcd is calculated with equation 6 and the rms off-state voltage (v off(rms) ) with equation 7 : table 29. calculation of the temperature compensating factor vt temperature range ( ?c) decimal value of td[7:0] equations of factor vt 0 0 to 48 49 to 96 97 to 143 144 to 230 [1] 231 t40 ? c ? ? vt 48 ? tsb 48 tsa ? ? ? = 40 ? c ? t ? 10 ? c ? ? vt 48 ? tsb 48 td[7:0] ? ?? tsa ? ? ? = 10 ? c ? t 20 ? c ?? vt 96 td[7:0] ? ?? tsb ? ?= 20 ? ct50 ? c ?? vt td[7:0] 96 ? ?? tsc ? = 50 ? c t 105 ? c ?? vt 47 tsc ? td[7:0] 143 ? ?? tsd ? + = 105 ? ct ? vt 47 tsc ? 88 tsd ? + = td 8 ? 40 + 0.6275 ------------------- 51 ? = vt 96 51 ? ?? ? 0.125 ? ? 5.625 == v offset lcd ?? 5.625 0.03 v ? 0.169 v == table 30. bias levels as a fu nction of multiplex rate multiplex rate lcd bias configuration bias voltages v 1 v 2 v 3 v 4 v 5 v 6 1:18 1 4 v lcd v ss 1:12 1 4 v lcd v ss 3 4 -- - v lcd 1 2 -- - v lcd 1 2 -- - v lcd 1 4 -- - v lcd 3 4 -- - v lcd 1 2 -- - v lcd 1 2 -- - v lcd 1 4 -- - v lcd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 39 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver (6) (7) where the values of a are a=3 for 1 4 bias and the values for n are n = 12 for 1:12 multiplex rate n = 18 for 1:18 mu ltiplex rate. discrimination (d) is the ratio of v on(rms) to v off(rms) and is determined from equation 8 . discrimination is a term which is defined as the ratio of the on and off rms voltage across a segment. it can be thought of as a measurement of contrast. (8) remark: ? row and column outputs compri se a series resistance r o (see ta b l e 3 8 ). ? v lcd is sometimes referred as the lcd operating voltage. 8.4.6.1 electro-optical performance suitable values for v on(rms) and v off(rms) are dependent on the lcd liquid used. the rms voltage, at which a pixel is switched on or off, determines the transmissibility of the pixel. for any given liquid, there are two threshold values defined. one point is at 10 % relative transmission (at v th(off) ) and the other at 90 % relative transmission (at v th(on) ), see figure 23 . for a good contrast performance, the following rules should be followed: (9) (10) v on(rms) and v off(rms) are properties of the display driver and are affected by the selection of a (see equation 6 ), n (see equation 8 ), and the v lcd voltage. v th(off) and v th(on) are properties of the lcd liquid and can be provided by the module manufacturer. v th(off) is sometimes named v th . v th(on) is sometimes named saturation voltage v sat . it is important to match the module properties to those of the driver in order to achieve optimum performance. v on rms ?? a 2 2a n ++ n 1a + ?? ? ----------------------------- - v lcd = v off rms ?? a 2 2a ? n + n 1a + ?? ? ----------------------------- - v lcd = d v on rms ?? off rms ?? ---------------------- - a1 + ?? n 1 ? ?? + a1 ? ?? n 1 ? ?? + ------------------------------------------- - == v on rms ?? v th on ?? ? v off rms ?? v th off ?? ?
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 40 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.4.7 lcd drive mode waveforms the pca8539 contains 18 backplane and 100 segment drivers, which drive the appropriate lcd bias voltages in sequence to the display and in accordance with the data to be displayed. unused outputs should be left open. the bias voltages and the timing are automati cally selected when the number of lines in the display is selected. figure 24 and figure 25 show typical waveforms. fig 23. electro-optical characteristic: relative transmission curve of the liquid 9 506 >9@ 2)) 6(*0(17 *5(< 6(*0(17 21 6(*0(17 9 wkrii 9 wkrq 5hodwlyh7udqvplvvlrq ddd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 41 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver state(n) marks intersection(com(x),s(n)) of lcd element(x,n). v state(n) (t) = v s(n) (t) ? v com(x) (t). v state1 (t) = v s0 (t) ? v com0 (t). v state2 (t) = v s1 (t) ? v com0 (t). fig 24. waveforms for the 1:18 multiplex drive mode. 5 bias levels, character mode, frame inversion mode ddd 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 966 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' /&'vhjphqwv vw dwh vwdwh &20 &20 &20 &20 6 6 vwdwh vwdwh iudphq iudphq
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 42 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver state(n) marks intersection(com(x),s(n)) of lcd element(x,n). v state(n) (t) = v s(n) (t) ? v com(x) (t). v state1 (t) = v s0 (t) ? v com0 (t). v state2 (t) = v s1 (t) ? v com0 (t). fig 25. waveforms for the 1:12 multiplex drive mode, 5 bias levels, character mode, r8 to r15 and r17 open, frame inversion mode ddd rshq 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 966 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 966 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 9/&' 966 /&'vhjphqwv vw dwh vwdwh &20 &20 &20 &20 &20 6 6 vwdwh vwdwh iudphq iudphq
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 43 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.5 display ram and general-purpose ram the pca8539 has a display ram and two general-purpose ram. the ram access is exemplified in figure 26 . 8.5.1 checksum in order to detect transmission failures for ram content transfers, the pca8539 has a checksum calculator providing an xor or crc-8 checksum. the checksum calculator can be configured with bit xc of the read_reg_select command (see section 8.1.1.5 ). the checksum result can be read out with the read_status_reg command (see section 8.1.1.6 ). the checksum results are: ? when xc = 0 (xor checksum) ? the checksum is the result of the xor operation on the values loaded with the write_data command and the previous register content. ? the checksum result is reset when the bits of the command select rs[1:0] or r/w are changed. ? when xc = 1 (crc-8 checksum) ? the checksum is the result of the crc-8 operation on the values loaded with the write_data command and the previous register content. the polynomial used is . ? the checksum result is reset when the bits of the command select rs[1:0] or r/w are changed. fig 26. ram access flowchart glvsod\5$0 edqnwr glvsod\5$0 edqnwr 5$0 dffhvv 5: 6hohfw dgguhvv $''>@ 60%>@ :ulwhgdwd :'>@ 6hohfw dgguhvv $''>@ :ulwhgdwd :'>@ 6hohf w dgguhv v $''> @ :ulwhgd wd :'> @ 6hohfw dgguhvv $''>@ 60%>@ 5hdggdwd 5'>@ 6hohfw dgguhvv $''>@ jhqhudo sxusrvh5$0 jhqhudo sxusrvh5$0 5hdggdwd 5'>@ 6hohfw dgguhvv $''>@ 5hdggdwd 5'>@ ddd jhqhudo sxusrvh5$0 jhqhudo sxusrvh5$0 x 8 x 5 x 4 1 +++
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 44 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 8.5.2 display ram and multiplex drive modes the display ram is a static 100 ? 18-bit ram which stores lcd data. logic 1 in the ram bit map indicates the on-state, logic 0 the of f-state of the corresponding lcd element. there is a one-to-one correspondence between the bits in the display ram bitmap ( ta b l e 3 1 ) and the lcd elements. the display ram bitmap ( table 31 ) shows that the display ram is organized in three ram banks. the access to the ram banks is controlled by smb[2:0] (see ta b l e 1 3 ). row 0 to row 17 in the display ram bitmap correspond with the backplane outputs com0 to com17, and column 0 to column 99 corres pond with the segment outputs s0 to s99. fig 27. logic diagram of the crc8 generator fig 28. checksum generation ,qsxw 06% /6% ddd :ulwhbgdwd :'>@ :'>@ ;25 &5& fkhfnvxpuhvxow &6>@ 5$0 ;& 5: 56> @ ddd
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 45 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver table 31. display ram bitmap ram bank ram bank select ram address row (back- plane) column (segment) ram bank ram bank select ram address row (back- plane) column (segment) bit bit smb[2:0] add[6:0] 4 3 2 1 0 smb[2:0] add[6:0] 4 3 2 1 0 1001 0h 0 01234 2010 34h 9 01234 1h 56789 35h 56789 2h 10 11 12 13 14 36h 10 11 12 13 14 3h 15 16 17 18 19 37h 15 16 17 18 19 4h 20 21 22 23 24 38h 20 21 22 23 24 5h 25 26 27 28 29 39h 25 26 27 28 29 6h 30 31 32 33 34 3ah 30 31 32 33 34 7h 35 36 37 38 39 3bh 35 36 37 38 39 8h 40 41 42 43 44 3ch 40 41 42 43 44 9h 45 46 47 48 49 3dh 45 46 47 48 49 ah 50 51 52 53 54 3eh 50 51 52 53 54 bh 55 56 57 58 59 3fh 55 56 57 58 59 ch 60 61 62 63 64 40h 60 61 62 63 64 dh 65 66 67 68 69 41h 65 66 67 68 69 eh 70 71 72 73 74 42h 70 71 72 73 74 fh 75 76 77 78 79 43h 75 76 77 78 79 10h 80 81 82 83 84 44h 80 81 82 83 84 11h 85 86 87 88 89 45h 85 86 87 88 89 12h 90 91 92 93 94 46h 90 91 92 93 94 13h 95 96 97 98 99 47h 95 96 97 98 99 14h 1 01234 48h 10 01234 15h 56789 49h 56789 16h 10 11 12 13 14 4ah 10 11 12 13 14 17h 15 16 17 18 19 4bh 15 16 17 18 19 18h 20 21 22 23 24 4ch 20 21 22 23 24 19h 25 26 27 28 29 4dh 25 26 27 28 29 1ah 30 31 32 33 34 4eh 30 31 32 33 34 1bh 35 36 37 38 39 4fh 35 36 37 38 39 1ch 40 41 42 43 44 50h 40 41 42 43 44 1dh 45 46 47 48 49 51h 45 46 47 48 49 1eh 50 51 52 53 54 52h 50 51 52 53 54 1fh 55 56 57 58 59 53h 55 56 57 58 59 20h 60 61 62 63 64 54h 60 61 62 63 64 21h 65 66 67 68 69 55h 65 66 67 68 69 22h 70 71 72 73 74 56h 70 71 72 73 74 23h 75 76 77 78 79 57h 75 76 77 78 79
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 46 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 1001 24h 1 80 81 82 83 84 2010 58h 10 80 81 82 83 84 25h 85 86 87 88 89 59h 85 86 87 88 89 26h 90 91 92 93 94 5ah 90 91 92 93 94 27h 95 96 97 98 99 5bh 95 96 97 98 99 28h 2 01234 5ch 11 01234 29h 56789 5dh 56789 2ah 10 11 12 13 14 5eh 10 11 12 13 14 2bh 15 16 17 18 19 5fh 15 16 17 18 19 2ch 20 21 22 23 24 60h 20 21 22 23 24 2dh 25 26 27 28 29 61h 25 26 27 28 29 2eh 30 31 32 33 34 62h 30 31 32 33 34 2fh 35 36 37 38 39 63h 35 36 37 38 39 30h 40 41 42 43 44 64h 40 41 42 43 44 31h 45 46 47 48 49 65h 45 46 47 48 49 32h 50 51 52 53 54 66h 50 51 52 53 54 33h 55 56 57 58 59 67h 55 56 57 58 59 34h 60 61 62 63 64 68h 60 61 62 63 64 35h 65 66 67 68 69 69h 65 66 67 68 69 36h 70 71 72 73 74 6ah 70 71 72 73 74 37h 75 76 77 78 79 6bh 75 76 77 78 79 38h 80 81 82 83 84 6ch 80 81 82 83 84 39h 85 86 87 88 89 6dh 85 86 87 88 89 3ah 90 91 92 93 94 6eh 90 91 92 93 94 3bh 95 96 97 98 99 6fh 95 96 97 98 99 3ch 3 01234 70h 12 01234 3dh 56789 71h 56789 3eh 10 11 12 13 14 72h 10 11 12 13 14 3fh 15 16 17 18 19 73h 15 16 17 18 19 40h 20 21 22 23 24 74h 20 21 22 23 24 41h 25 26 27 28 29 75h 25 26 27 28 29 42h 30 31 32 33 34 76h 30 31 32 33 34 43h 35 36 37 38 39 77h 35 36 37 38 39 44h 40 41 42 43 44 78h 40 41 42 43 44 45h 45 46 47 48 49 79h 45 46 47 48 49 46h 50 51 52 53 54 7ah 50 51 52 53 54 47h 55 56 57 58 59 7bh 55 56 57 58 59 48h 60 61 62 63 64 7ch 60 61 62 63 64 49h 65 66 67 68 69 7dh 65 66 67 68 69 table 31. display ram bitmap ?continued ram bank ram bank select ram address row (back- plane) column (segment) ram bank ram bank select ram address row (back- plane) column (segment) bit bit smb[2:0] add[6:0] 4 3 2 1 0 smb[2:0] add[6:0] 4 3 2 1 0
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 47 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 1001 4ah 3 70 71 72 73 74 2010 7eh 12 70 71 72 73 74 4bh 75 76 77 78 79 7fh 75 76 77 78 79 4ch 8081828384 3011 0h 80 81 82 83 84 4dh 8586878889 1h 8586878889 4eh 9091929394 2h 9091929394 4fh 9596979899 3h 9596979899 50h 4 01234 4h 13 01234 51h 56789 5h 56789 52h 1011121314 6h 1011121314 53h 1516171819 7h 1516171819 54h 2021222324 8h 2021222324 55h 2526272829 9h 2526272829 56h 3031323334 ah 3031323334 57h 3536373839 bh 3536373839 58h 4041424344 ch 4041424344 59h 4546474849 dh 4546474849 5ah 5051525354 eh 5051525354 5bh 5556575859 fh 5556575859 5ch 60 61 62 63 64 10h 60 61 62 63 64 5dh 65 66 67 68 69 11h 65 66 67 68 69 5eh 70 71 72 73 74 12h 70 71 72 73 74 5fh 75 76 77 78 79 13h 75 76 77 78 79 60h 80 81 82 83 84 14h 80 81 82 83 84 61h 85 86 87 88 89 15h 85 86 87 88 89 62h 90 91 92 93 94 16h 90 91 92 93 94 63h 95 96 97 98 99 17h 95 96 97 98 99 64h 5 01234 18h 14 01234 65h 56789 19h 56789 66h 10 11 12 13 14 1ah 10 11 12 13 14 67h 15 16 17 18 19 1bh 15 16 17 18 19 68h 20 21 22 23 24 1ch 20 21 22 23 24 69h 25 26 27 28 29 1dh 25 26 27 28 29 6ah 30 31 32 33 34 1eh 30 31 32 33 34 6bh 35 36 37 38 39 1fh 35 36 37 38 39 6ch 40 41 42 43 44 20h 40 41 42 43 44 6dh 45 46 47 48 49 21h 45 46 47 48 49 6eh 50 51 52 53 54 22h 50 51 52 53 54 6fh 55 56 57 58 59 23h 55 56 57 58 59 table 31. display ram bitmap ?continued ram bank ram bank select ram address row (back- plane) column (segment) ram bank ram bank select ram address row (back- plane) column (segment) bit bit smb[2:0] add[6:0] 4 3 2 1 0 smb[2:0] add[6:0] 4 3 2 1 0
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 48 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 1001 70h 5 60 61 62 63 64 3011 24h 14 60 61 62 63 64 71h 65 66 67 68 69 25h 65 66 67 68 69 72h 70 71 72 73 74 26h 70 71 72 73 74 73h 75 76 77 78 79 27h 75 76 77 78 79 74h 80 81 82 83 84 28h 80 81 82 83 84 75h 85 86 87 88 89 29h 85 86 87 88 89 76h 90 91 92 93 94 2ah 90 91 92 93 94 77h 95 96 97 98 99 2bh 95 96 97 98 99 78h 6 01234 2ch 15 01234 79h 56789 2dh 56789 7ah 10 11 12 13 14 2eh 10 11 12 13 14 7bh 15 16 17 18 19 2fh 15 16 17 18 19 7ch 20 21 22 23 24 30h 20 21 22 23 24 7dh 25 26 27 28 29 31h 25 26 27 28 29 7eh 30 31 32 33 34 32h 30 31 32 33 34 7fh 35 36 37 38 39 33h 35 36 37 38 39 2010 0h 40 41 42 43 44 34h 40 41 42 43 44 1h 45 46 47 48 49 35h 45 46 47 48 49 2h 50 51 52 53 54 36h 50 51 52 53 54 3h 55 56 57 58 59 37h 55 56 57 58 59 4h 60 61 62 63 64 38h 60 61 62 63 64 5h 65 66 67 68 69 39h 65 66 67 68 69 6h 70 71 72 73 74 3ah 70 71 72 73 74 7h 75 76 77 78 79 3bh 75 76 77 78 79 8h 80 81 82 83 84 3ch 80 81 82 83 84 9h 85 86 87 88 89 3dh 85 86 87 88 89 ah 90 91 92 93 94 3eh 90 91 92 93 94 bh 95 96 97 98 99 3fh 95 96 97 98 99 ch 7 01234 40h 16 01234 dh 56789 41h 56789 eh 10 11 12 13 14 42h 10 11 12 13 14 fh 15 16 17 18 19 43h 15 16 17 18 19 10h 20 21 22 23 24 44h 20 21 22 23 24 11h 25 26 27 28 29 45h 25 26 27 28 29 12h 30 31 32 33 34 46h 30 31 32 33 34 13h 35 36 37 38 39 47h 35 36 37 38 39 14h 40 41 42 43 44 48h 40 41 42 43 44 15h 45 46 47 48 49 49h 45 46 47 48 49 table 31. display ram bitmap ?continued ram bank ram bank select ram address row (back- plane) column (segment) ram bank ram bank select ram address row (back- plane) column (segment) bit bit smb[2:0] add[6:0] 4 3 2 1 0 smb[2:0] add[6:0] 4 3 2 1 0
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 49 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver in multiplexed lcd applications, the data of each row of the display ram is time-multiplexed with the corresponding back plane (row 0 with com0, row 1 with com1, and so on). two multiplex drive modes are available: ? 1:18 multiplex drive mode ? gmx = 0 (default value, see ta b l e 1 2 ) ? pins com0 to com17 are active 2010 16h 7 50 51 52 53 54 3011 4ah 16 50 51 52 53 54 17h 55 56 57 58 59 4bh 55 56 57 58 59 18h 60 61 62 63 64 4ch 60 61 62 63 64 19h 65 66 67 68 69 4dh 65 66 67 68 69 1ah 70 71 72 73 74 4eh 70 71 72 73 74 1bh 75 76 77 78 79 4fh 75 76 77 78 79 1ch 80 81 82 83 84 50h 80 81 82 83 84 1dh 85 86 87 88 89 51h 85 86 87 88 89 1eh 90 91 92 93 94 52h 90 91 92 93 94 1fh 95 96 97 98 99 53h 95 96 97 98 99 20h 8 01234 54h 17 01234 21h 56789 55h 56789 22h 10 11 12 13 14 56h 10 11 12 13 14 23h 15 16 17 18 19 57h 15 16 17 18 19 24h 20 21 22 23 24 58h 20 21 22 23 24 25h 25 26 27 28 29 59h 25 26 27 28 29 26h 30 31 32 33 34 5ah 30 31 32 33 34 27h 35 36 37 38 39 5bh 35 36 37 38 39 28h 40 41 42 43 44 5ch 40 41 42 43 44 29h 45 46 47 48 49 5dh 45 46 47 48 49 2ah 50 51 52 53 54 5eh 50 51 52 53 54 2bh 55 56 57 58 59 5fh 55 56 57 58 59 2ch 60 61 62 63 64 60h 60 61 62 63 64 2dh 65 66 67 68 69 61h 65 66 67 68 69 2eh 70 71 72 73 74 62h 70 71 72 73 74 2fh 75 76 77 78 79 63h 75 76 77 78 79 30h 80 81 82 83 84 64h 80 81 82 83 84 31h 85 86 87 88 89 65h 85 86 87 88 89 32h 90 91 92 93 94 66h 90 91 92 93 94 33h 95 96 97 98 99 67h 95 96 97 98 99 table 31. display ram bitmap ?continued ram bank ram bank select ram address row (back- plane) column (segment) ram bank ram bank select ram address row (back- plane) column (segment) bit bit smb[2:0] add[6:0] 4 3 2 1 0 smb[2:0] add[6:0] 4 3 2 1 0
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 50 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver ? 1:12 multiplex drive mode ? gmx = 1 (default value, see ta b l e 1 2 ) ? pins com0 to com12 are active 8.5.2.1 display ram addressing for addressing the display ram the following steps have to be taken: ? select the display ram bank (smb[2:0]) with the sel_mem_bank command (see section 8.1.1.8 ) ? set the requested address counter (add[6:0]) with the set_mem_addr command (see section 8.1.1.9 ) ? write data to the display ram with the write_data command (wd[4:0]) (see section 8.1.1.11 ) ? read the data from the display ram with the read_data command (rd[4:0]) (see section 8.1.1.10 ) 8.5.3 general-purpose ram the pca8539 has to general-purpose ram. the access to the ram is controlled by the sel_mem_bank command (smb[2:0]) (see ta b l e 1 3 ). general-purpose ram 1 has the size of 640 bit (80 ? 8) and general-purpose ram 2 of 400 bit (80 ? 5). 8.5.3.1 general-purpose ram addressing for addressing the general-purpose ram the following steps have to be taken: ? select the general-purpose ram (smb[2:0]) with the sel_mem_bank command (see section 8.1.1.8 ) ? set the requested address counter (add[6:0]) with the set_mem_addr command (see section 8.1.1.9 ) ? write data to the general-purpose ram with the write_data command (wd[7:0] or wd[4:0]) (see section 8.1.1.11 ) ? read the data from the general-purpose ram with the read_data command (rd[7:0] or rd[4:0]) (see section 8.1.1.10 )
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 51 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 9. bus interfaces 9.1 control byte and register selection after initiating the communication over the bus and sending the slave address (i 2 c-bus, see section 9.2 ) or subaddress (spi-bus, see section 9.3 ), a control byte follows. the purpose of this byte is to indicate both, the content for the following data bytes (ram or command) and to indica te that more control bytes will follow. typical sequences could be: ? slave address/subaddress - control byte - command byte - command byte - command byte - end ? slave address/subaddress - control byte - ram byte - ram byte - ram byte - end ? slave address/subaddress - control byte - command byte - control byte - ram byte - end this allows sending a mixture of ram and command data in one access or alternatively, to send just one type of data in one access. in this way, it is possible to configure the device and then fill the display ram with little overhead. the display bytes are stored in the display ram at the address specified by the data pointer. table 32. control byte description bit symbol value description 7co continue bit 0 last control byte 1 control bytes continue 6 to 5 rs[1:0] register selection 00, 10, 11 command register 01 ram data 4 to 0 - - unused fig 29. control byte format ddd qrwuhohydqw &2 56>@ 06% /6%
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 52 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 9.2 i 2 c interface the i 2 c-bus is for bidirectional, two-line communication between different ics or modules. the two lines are a serial data line (sda) and a serial clock line (scl). both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. data transfer may be initiated only when the bus is not busy. in chip-on-glass (cog) app lications, where the track resistance between the sda output pin to the system sda input line can be significant, the bus pull-up resistor and the indium tin oxide (ito) track resistance may generate a voltage divider. as a consequence it may be possible that the ackn owledge cycle, generated by the lcd driver, cannot be interpreted as logic 0 by the ma ster. therefore it is an advantage for cog applications to have the acknowledge output separated from the data line. for that reason, the sda line of the pca8539 is split into sdain and sdaout. in cog applications where the acknowledge cycle is required, it is necessary to minimize the track resistance from the sdaout pin to the system sdain line to guarantee a valid low level. by splitting the sda line into sdain and sd aout (having the sdao ut open circuit), the device could be used in a mode that ignores the acknowledge cycle. separating the acknowledge output from the serial data line can avoid design efforts to generate a valid acknowledge level. however, in that case the i 2 c-bus master has to be set up in such a way that it ignores the acknowledge cycle. 2 by connecting pin sdaout to pin sd ain the sdain line becomes fully i 2 c-bus compatible (see figure 30 ). the following definition assumes that sdain and sdaout are connected and refers to the pair as sda. 9.2.1 bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable during the high period of the clock pulse as changes in the data line at this time are interpreted as a control signal (see figure 31 ). 2. for further information, consider the nxp application note: ref. 1 ? an10170 ? . fig 30. sdaout and sdain configuration ddd 6'$,1 wzrzluhprgh 6'$287 6'$,1 vlqjohzluhprgh 6'$287
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 53 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 9.2.2 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low change of the data line, while the clock is high is defined as the start condition (s). a low-to-high change of the data line while th e clock is high is defined as the stop condition (p). the start and stop conditions are shown in figure 32 . 9.2.3 system configuration a device generating a message is a transmit ter; a device receiving a message is the receiver. the device that controls the message is the master; and the devices which are controlled by the master are the slaves. the system configuration is shown in figure 33 . 9.2.4 acknowledge the number of data bytes transferred between the start and stop conditions from transmitter to receiver is un limited. each byte of 8 bits is followed by an acknowledge cycle. fig 31. bit transfer ped gdwdolqh vwdeoh gdwdydolg fkdqjh rigdwd doorzhg 6'$ 6&/ fig 32. definition of start and stop conditions pef 6'$ 6&/ 3 6723frqglwlrq 6'$ 6&/ 6 67$57frqglwlrq fig 33. system configuration pjd 6'$ 6&/ 0$67(5 75$160,77(5 5(&(,9(5 0$67(5 75$160,77(5 6/$9( 75$160,77(5 5(&(,9(5 6/$9( 5(&(,9(5 0$67(5 75$160,77(5 5(&(,9(5
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 54 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver ? a slave receiver which is addressed must generate an acknowledge after the reception of each byte. ? also a master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. ? the device that acknowledges must pull-down the sda line during the acknowledge clock pulse, so that the sda line is st able low during the high period of the acknowledge related clock pulse (set-up and hold times must be considered). ? a master receiver must signal an end of da ta to the transmitter by not generating an acknowledge on the last byte that has been cl ocked out of the slave. in this event, the transmitter must leave the data line high to enable the master to generate a stop condition. acknowledgement on the i 2 c-bus is shown in figure 34 . 9.2.5 i 2 c-bus controller the pca8539 acts as an i 2 c-bus slave. it does not initiate i 2 c-bus transfers. 9.2.6 input filters to enhance noise immunity in electrically ad verse environments, rc low-pass filters are provided on the sda and scl lines. 9.2.7 i 2 c-bus slave address device selection depends on the i 2 c-bus slave address. two different i 2 c-bus slave addresses can be us ed to address the pca8539 (see ta b l e 3 3 ). the least significant bit of the slave address byte is bit r/w (see ta b l e 3 4 ). fig 34. acknowledgement on the i 2 c-bus pef 6 67$57 frqglwlrq forfnsxovhiru dfnqrzohgjhphqw qrwdfnqrzohgjh dfnqrzohgjh gdwdrxwsxw e\wudqvplwwhu gdwdrxwsxw e\uhfhlyhu 6&/iurp pdvwhu table 33. i 2 c slave address byte slave address bit 7 6 5 4 3 2 1 0 msb lsb slave address 0 1 1 1 0 1 sa0 r/w
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 55 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver bit 1 of the slave address is defined by connecting the input sa0 to either v ss1 (logic 0) or v dd1 (logic 1). therefore, two instances of pca8539 can be distinguished on the same i 2 c-bus. 9.2.8 i 2 c-bus protocol the i 2 c-bus protocol is shown in figure 35 . the sequence is initiated with a start condition (s) from the i 2 c-bus master which is followed by one of the two slave addresses available. all pca8539 with the correspondin g sa0 level acknowledge in parallel to the slave address, but all pca8539 with the alternative sa0 level ignore the whole i 2 c-bus transfer. after acknowledgement, a control byte (see section 9.1 ) follows which defines if the next byte is ram or command information. the control byte also defines if the next byte is a control byte or further ram or command data. in this way, it is possible to configure the devi ce and then fill the display ram with little overhead. the display bytes are stored in the display ram at the address specified by the data pointer. the acknowledgement after each byte is made only by the addressed pca8539. after the last display byte, the i 2 c-bus master issues a stop cond ition (p). alternatively a start may be issued to restart an i 2 c-bus access. table 34. r/w -bit description r/w description 0 write data 1 read data fig 35. i 2 c-bus protocol write mode (;$03/(6 dwudqvplwwzre\whvri5$0gdwd &200$1' 6 $ & 2 6 $ 5 6 $3 0 6 % / 6 % 5 6 5: frqwuroe\wh vodyhdgguhvv 5$0frppdqge\wh 6 $ 6 $ $$$3 5$0'$7$ 5$0'$7$ ewudqvplwwzrfrppdqge\whv 6 $ 6 $ $$$$3 &200$1' 5$0'$7$ 5$0'$7$ fwudqvplwrqhfrppdqge\whdqgwzr5$0gdwhe\whv 6 $ 6 $ $$$$ 3 $ &200$1'
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 56 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver if a register readout is made, the r/w bit must be logic 1 and then the next data byte following is provided by the pca8539 as shown in figure 36 . fig 36. i 2 c-bus protocol read mode ddd 5: vodyhdgguhvv uhjlvwhu uhdgrxwe\wh dfnqrzohgjh iurp3&$ dfnqrzohgjh iurppdvwhu 6 $ 0 6 % / 6 % 6 $ 3 $
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 57 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 9.3 spi interface data transfer to the device is made via a four-line spi-bus (see ta b l e 3 5 ). the spi-bus is initialized whenever the chip enable line pin ce is inactive. [1] the chip enable must not be wired permanently low. 9.3.1 spi-bus data transfer the chip enable signal is used to identify t he transmitted data. each data transfer is a byte, with the msb sent first. the transmission is controlled by the active low chip enable signal ce . the first byte transmitted is the subaddress byte. the subaddress byte opens the communication with a read/write bit and a subaddress. the subaddress is used to identify multiple devices on one spi bus. after the subaddress byte, a control byte follows (see section 9.1 ). the purpose of this byte is to indicate the content for the following data bytes (ram, command or control byte). in this way, it is possible to send a mixt ure of ram and command data in one access or alternatively, to send just one type of data in one access. table 35. serial interface symbol function description ce chip enable input; active low [1] when high, the in terface is reset scl serial clock input input may be higher than v dd1 sdi/sdain serial data input input may be higher than v dd1 ; input data is sampled on the rising edge of scl sdo serial data output fig 37. spi data transfer overview table 36. subaddress byte definition bit symbol value description 7r/w data read or write selection 0 write data 1 read data 6to5 sa 01 subaddress ; other codes cause the device to ignore data transfer 4to0 - unused ddd gdwdexv &( 68%$''5(66 '$7$ '$7$ '$7$
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 58 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver data transfers are terminated by de-asserting ce (set ce to logic 1). fig 38. spi-bus write example (;$03/(6 dwudqvplwwzre\whvriglvsod\5$0gdwd &200$1' & 2 5 6 5 6 0 6 % / 6 % 5: frqwuroe\wh vxedgguhvv 5$0frppdqge\wh 5$0'$7$ 5$0'$7$ ewudqvplwwzrfrppdqge\whv &200$1'
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 59 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 10. internal circuitry fig 39. device protection diagram ddd 9/&',1 966 &20wr&20 6wr6 9'' 966 ,)66'2&( 3'6$&/.26& 567777 966 966 966 966 9''9/&',19/&'6(16( 9/&'2876&/6',6'$ ,1 6'$2877 966 3:5,1 966966 9669'' 966966 9'' 3:5287 966
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 60 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 11. safety notes caution this device is sensitive to electrostatic di scharge (esd). observe precautions for handling electrostatic sensitive devices. such precautions are described in the ansi/esd s20.20 , iec/st 61340-5 , jesd625-a or equivalent standards. caution static voltages across the liquid crystal display can build up when the lcd supply voltage (v lcd ) is on while the ic supply voltage (v dd ) is off, or vice versa. this may cause unwanted display artifacts. to av oid such artifacts, v lcd and v dd must be applied or removed together. caution semiconductors are light sens itive. exposure to light s ources can cause the ic to malfunction. the ic must be protected agains t light. the protection must be applied to all sides of the ic.
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 61 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 12. limiting values [1] pass level; human body model (hbm), according to ref. 8 ? jesd22-a114 ? . [2] pass level; latch-up testing according to ref. 10 ? jesd78 ? at maximum ambient temperature (t amb(max) ). [3] according to the store and transport requirements (see ref. 13 ? um10569 ? ) the devices have to be stored at a temperature of +8 ? c to +45 ? c and a humidity of 25 % to 75 %. table 37. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v dd1 supply voltage 1 analog and digital ? 0.5 +6.5 v v dd2 supply voltage 2 charge pump ? 0.5 +6.5 v i dd1 supply current 1 analog and digital ? 50 +50 ma i dd2 supply current 2 charge pump ? 50 +50 ma v lcd lcd supply voltage external supply, input on pin vlcdin ? 0.5 +20 v i dd(lcd) lcd supply current ? 50 +50 ma v i input voltage on pins clk, osc, rst , pd, ifs, scl, sdi/sdain, sa0, ce ? 0.5 +6.5 v on pin vlcdsense ? 0.5 +20 v i i input current ? 10 +10 ma v o output voltage on pins s0 to s99, com0 to com17, vlcdout ? 0.5 +20 v on pins sdo, sdaout, clk ? 0.5 +6.5 v i o output current ? 10 +10 ma i ss ground supply current ? 50 +50 ma p tot total power dissipation - 400 mw p/out power dissipation per output -1 0 0m w v esd electrostatic discharge voltage hbm [1] - ? 3000 v i lu latch-up current [2] -1 0 0m a t stg storage temperature [3] ? 65 +150 ?c t amb ambient temperature operating device ? 40 +105 ?c
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 62 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 13. static characteristics table 38. static characteristics v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. symbol parameter conditions min typ max unit supplies v dd1 supply voltage 1 2.5 - 5.5 v v dd2 supply voltage 2 2.5 - 5.5 v v lcd lcd supply voltage v lcd ? v dd2 external supply, input on pin vlcdin 4.0 - 16.0 v internal supply, output on pin vlcdout 4.0 - 16.0 v i dd1 supply current 1 on pin v dd1 ; see figure 40 default condition after power-on and initialize command -40 [1] 59 [2] ? a display enabled; internal clock -95 [1] - ? a i dd2 supply current 2 on pin v dd2 default condition after power-on and initialize command; charge pump off -0- ? a v dd2 =5v; charge pump at v lcd =2 ? v dd2 ; v lcd =8v; c vlcd = 100 nf; display disabled; see figure 41 -2 5- ? a i dd(lcd) lcd supply current on pin vlcdin; external v lcd =8v display disabled - 7 12 ? a mux 1:18; 1 4 bias; f fr =80hz; all display elements on; frame inversion mode; display enabled; no display attached; see figure 42 -7 0- ? a i dd(pd) power-down mode supply current on pin vdd1; pin pd is high; v dd1 =5v; t amb =25 ?c -2- ? a
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 63 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver accuracy ? v lcd lcd voltage variation on pin vlcdout; internal v lcd ; v lcd =8v; t amb =25 ?c; see figure 43 7.98 8.1v ? f fr frame frequency variation internal clock; f fr = 80 hz; t amb =25 ?c; see figure 44 77 80 83 hz ? t meas measurement temperature variation t amb =25 ?c2 2 2 5 2 8 ?c output resistance r o output resistance on pin com0 to com17; external v lcd =8v -1-k ? on pin s0 to s99; external v lcd =8v -2 . 5-k ? logic on pins clk, osc, pd, rst , ifs, sa0 v il low-level input voltage ? 0.3 - 0.3v dd1 v v ih high-level input voltage 0.7v dd1 -v dd1 + 0.3 v i li input leakage current v i = v dd1 or v ss1 -0- ? a on pins clk v oh high-level output voltage 0.8v dd1 -v dd1 + 0.3 v v ol low-level output voltage ? 0.3 - 0.2v dd1 v i oh high-level output current output source current; v oh =4.6v; v dd1 =5v 1- - ma i ol low-level output current output sink current; v ol =0.4v; v dd1 =5v 1- - ma i lo output leakage current v o = v dd1 or v ss1 -0- ? a i 2 c-bus on pins scl, sdi/sdain v il low-level input voltage ? 0.3 - 0.3v dd1 v v ih high-level input voltage 0.7v dd1 -5 . 5v i li input leakage current v i = v dd1 or v ss1 -0- ? a table 38. static characteristics ?continued v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. symbol parameter conditions min typ max unit
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 64 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver [1] v dd1 =5v; t amb =25 ? c. [2] v dd1 = 5.5 v; t amb = 105 ? c. on pin sdaout v o output voltage ? 0.5 - +5.5 v i ol low-level output current output sink current; v ol =0.4v 6- - ma i li input leakage current v i = v dd1 or v ss1 -0- ? a i lo output leakage current v o =v ss1 -0- ? a spi-bus on pins scl, sdi/sdain, ce v il low-level input voltage ? 0.3 - 0.3v dd1 v v ih high-level input voltage 0.7v dd1 -v dd1 + 0.3 v i li input leakage current v i = v dd1 or v ss1 -0- ? a on pin sdo v oh high-level output voltage 0.8v dd1 -v dd1 + 0.3 v v ol low-level output voltage ? 0.3 - 0.2v dd1 v i oh high-level output current output source current; v oh =4.6v; v dd1 =5v 1- - ma i ol low-level output current output sink current; v ol =0.4v; v dd1 =5v 1- - ma i lo output leakage current v o = v dd1 or v ss1 -0- ? a table 38. static characteristics ?continued v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. symbol parameter conditions min typ max unit
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 65 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver v dd1 =5v. (1) display enabled, oscillator enabled. (2) default conditions after power-on and initialization. fig 40. typical i dd1 with respect to temperature (1) v dd2 = 3 v; charge pump at v lcd =3 ? v dd2 ; v lcd =8v; c vlcd = 100 nf; display disabled. (2) v dd2 = 5 v; charge pump at v lcd =2 ? v dd2 ; v lcd =8v; c vlcd = 100 nf; display disabled. (3) default conditions after power-on and initialization; charge pump off. fig 41. typical i dd2 with respect to temperature ddd 7 dpe ?& , '' '' , '' ?$ ?$ ?$ ddd 7 dpe ?& , '' '' , '' ?$ ?$ ?$
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 66 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver external v lcd =8v. (1) driving mode 1:18, f fr = 80 hz; frame inversion; no load; display enabled. (2) driving mode 1:18, f fr = 80 hz; frame inversion; no load; display disabled. fig 42. typical i dd(lcd) with respect to temperature conditions: v dd2 = 5 v; charge pump at v lcd =2 ? v dd2 ; v lcd = 8 v; vlcd[8:0] = 134h; temperature compensation disabled. fig 43. typical v lcd variation with respect to temperature ddd 7 dpe ?& , ''/&' ''/&' , ''/&' ?$ ?$ ?$ ddd 7 dpe ?& 9 /&' /&' 9 /&' 9 9 9
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 67 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver conditions: frame frequency presca ler = 00111; 80 hz typical. fig 44. typical frame frequency varia tion with respec t to temperature fig 45. measurement temperature variation with respect to temperature ddd 7 dpe ?& i iu iu i iu +] +] +] ddd 7 dpe ?& 7 phdv phdv 7 phdv ?& ?& ?& 7 phdvpd[ phdvpd[ 7 phdvpd[ 7 phdvw\s phdvw\s 7 phdvw\s 7 phdvplq phdvplq 7 phdvplq
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 68 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 14. dynamic characteristics 14.1 general timing characteristics 14.2 i 2 c-bus timing characteristics [1] all timing values are valid within the operating supply voltage and ambient temperature range and are referenced to v il and v ih with an input voltage swing of v ss1 to v dd1 . [2] t vd;dat = minimum time for valid sda output following scl low. [3] t vd;ack = time for acknowledgement signal from scl low to sda output low. table 39. general dynamic characteristics v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. symbol parameter conditions min typ max unit f clk(int) internal clock frequency on pin clk; t amb =25 ?c; ff[4:0] = 00111 61600 64000 66400 hz f clk(ext) external clock frequency on pin clk 36000 - 288000 hz t clk(h) high-level clock time external clock source used 5 - - ? s t clk(l) low-level clock time 5 - - ? s table 40. i 2 c-bus timing characteristics v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. [1] symbol parameter conditions min typ max unit f scl scl frequency - - 400 khz t buf bus free time between a stop and start condition 1.3 - - ? s t hd;sta hold time (repeated) start condition 0.6 - - ? s t su;sta set-up time for a repeated start condition 0.6 - - ? s t vd;dat data valid time [2] --0 . 9 ? s t vd;ack data valid acknowledge time [3] --0 . 9 ? s t low low period of the scl clock 1.3 - - ? s t high high period of the scl clock 0.6 - - ? s t f fall time of both sda and scl signals - - 0.3 ? s t r rise time of both sda and scl signals - - 0.3 ? s c b capacitive load for each bus line --400pf t su;dat data set-up time 100 - - ns t hd;dat data hold time 0 - - ns t su;sto set-up time for stop condition 0.6 - - ? s t w(spike) spike pulse width - - 50 ns
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 69 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 14.3 spi-bus timi ng characteristics fig 46. driver timing waveforms ddd &/. w fon+ w fon/ i fon 9 '' 9 '' fig 47. i 2 c-bus timing diagram 35272&2/ 6&/ 6'$ ddd %,7 /6% 5: 67$57 &21',7,21 6 %,7 06% $ %,7 $ $&.12:/('*( $ 6723 &21',7,21 3 w 6867$ w +'67$ w 68'$7 w +''$7 w 9''$7 w 68672 w /2: w +,*+ i 6&/ w %8) w u w i table 41. spi-bus characteristics v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. all timing values are valid within the operating supply voltage at ambient temperature and referenced to v il and v ih with an input voltage swing of v ss1 to v dd1 (see figure 48 ). symbol parameter conditions min max unit pin scl f clk(scl) scl clock frequency - 3.0 mhz t scl scl time 333 - ns t clk(h) clock high time 100 - ns t clk(l) clock low time 150 - ns t r rise time for scl signal - 100 ns t f fall time for scl signal - 100 ns pin ce t su(ce_n) ce_n set-up time 30 - ns t h(ce_n) ce_n hold time 30 - ns t rec(ce_n) ce_n recovery time 30 - ns
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 70 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver [1] no load value; bus is held up by bus capacitance; use rc time c onstant with application values. pin sdi t su set-up time set-up time for sdi data 30 - ns t h hold time hold time for sdi data 30 - ns pin sdo t d(r)sdo sdo read delay time c l = 100 pf - 150 ns t dis(sdo) sdo disable time [1] -5 0n s t t(sdi-sdo) transition time from sdi to sdo to avoid bus conflict 0 - ns table 41. spi-bus characteristics ?continued v dd1 , v dd2 = 2.5 v to 5.5 v; v ss1 = 0 v; v lcd = 4.0 v to 16.0 v; t amb = ? 40 ? c to +105 ? c; unless otherwise specified. all timing values are valid within the operating supply voltage at ambient temperature and referenced to v il and v ih with an input voltage swing of v ss1 to v dd1 (see figure 48 ). symbol parameter conditions min max unit fig 48. spi-bus timing ddd &( 6&/ 6',6'$,1 6$ 5$ e e e 6',6'$,1 e e e e e e 6'2 6'2 5($' :5,7( kljk= kljk= 5: w vx&(b1 w uhf&(b1 w u w i w fon+ w fon/ w fon6&/ w vx w g56'2 w glv6'2 w w6',6'2 w k w k&(b1
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 71 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 15. test information 15.1 quality information this product has been qualified to the appropriate automotive electronics council (aec) standard q100 or q101 and is suitable for use in automotive applications.
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 72 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 16. bare die outline fig 49. bare die outline of PCA8539DUG 5hihuhqfhv 2xwolqh yhuvlrq (xurshdq surmhfwlrq ,vvxhgdwh ,(& -('(& -(,7$ 3&$'8* sfdgxjbgr %duhglhexpsv 3&$'8* ; [ \ ' ( ghwdlo< h h e / ghwdlo; $ $ $ pp <
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 73 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver table 42. dimensions of PCA8539DUG original dimensions are in mm. unit (mm) a a 1 a 2 b d e e e 1 l max -0.018------- nom 0.395 0.015 0.38 0.025 5.64 1.24 0.040 0.114 0.1 min -0.012------- table 43. bump locations of PCA8539DUG all x/y coordinates represent the position of the ce nter of each bump with respect to the center (x/y = 0) of the chip; see figure 49 symbol pin coordinates pitch symbol pin coordinates pitch x (m) y (m) x (m) x (m) y (m) x (m) com13 1 -2711.3 -509.0 - com4 119 2681.5 509.0 - 2 -2666.3 -509.0 -45.0 120 2636.5 509.0 45.0 3 -2621.3 -509.0 -45.0 121 2591.5 509.0 45.0 com14 4 -2576.3 -509.0 -45.0 c om3 122 2546.5 509.0 45.0 5 -2531.3 -509.0 -45.0 123 2501.5 509.0 45.0 com15 6 -2486.3 -509.0 -45.0 c om2 124 2456.5 509.0 45.0 7 -2441.3 -509.0 -45.0 125 2411.5 509.0 45.0 com16 8 -2396.3 -509.0 -45.0 c om1 126 2366.5 509.0 45.0 9 -2351.3 -509.0 -45.0 127 2321.5 509.0 45.0 vlcdin 10 -2242.7 -509.0 -108.6 com0 128 2276.5 509.0 45.0 11 -2197.7 -509.0 -45.0 129 2231.5 509.0 45.0 12 -2152.7 -509.0 -45.0 com17 130 2186.5 509.0 45.0 13 -2107.7 -509.0 -45.0 131 2141.5 509.0 45.0 vlcdsense 14 -2062.7 -509.0 -45.0 s99 132 2027.9 509.0 113.6 15 -2017.7 -509.0 -45.0 s98 133 1987.9 509.0 40.0 16 -1972.7 -509.0 -45.0 s97 134 1947.9 509.0 40.0 vlcdout 17 -1927.7 -509.0 -45.0 s96 135 1907.9 509.0 40.0 18 -1882.7 -509.0 -45.0 s95 136 1867.9 509.0 40.0 19 -1837.7 -509.0 -45.0 s94 137 1827.9 509.0 40.0 20 -1792.7 -509.0 -45.0 s93 138 1787.9 509.0 40.0 vss2 21 -1747.7 -509.0 -45.0 s 92 139 1747.9 509.0 40.0 22 -1702.7 -509.0 -45.0 s91 140 1707.9 509.0 40.0 23 -1657.7 -509.0 -45.0 s90 141 1667.9 509.0 40.0 24 -1612.7 -509.0 -45.0 s89 142 1627.9 509.0 40.0 25 -1567.7 -509.0 -45.0 s88 143 1587.9 509.0 40.0 26 -1522.7 -509.0 -45.0 s87 144 1547.9 509.0 40.0 27 -1477.7 -509.0 -45.0 s86 145 1507.9 509.0 40.0 28 -1432.7 -509.0 -45.0 s85 146 1467.9 509.0 40.0 29 -1387.7 -509.0 -45.0 s84 147 1427.9 509.0 40.0 30 -1342.7 -509.0 -45.0 s83 148 1387.9 509.0 40.0
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 74 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver vss3 31 -1297.7 -509.0 -45.0 s 82 149 1347.9 509.0 40.0 32 -1252.7 -509.0 -45.0 s81 150 1307.9 509.0 40.0 33 -1207.7 -509.0 -45.0 s80 151 1267.9 509.0 40.0 34 -1162.7 -509.0 -45.0 s79 152 1227.9 509.0 40.0 vss1 35 -1117.7 -509.0 -45. 0 s78 153 1187.9 509.0 40.0 36 -1072.7 -509.0 -45.0 s 77 154 1147.9 509.0 40.0 37 -1027.7 -509.0 -45.0 s 76 155 1107.9 509.0 40.0 38 -982.7 -509.0 -45.0 s75 156 1067.9 509.0 40.0 39 -937.7 -509.0 -45.0 s74 157 1027.9 509.0 40.0 40 -892.7 -509.0 -45.0 s 73 158 987.9 509.0 40.0 41 -847.7 -509.0 -45.0 s 72 159 947.9 509.0 40.0 42 -802.7 -509.0 -45.0 s 71 160 907.9 509.0 40.0 43 -757.7 -509.0 -45.0 s 70 161 867.9 509.0 40.0 44 -712.7 -509.0 -45.0 s 69 162 827.9 509.0 40.0 45 -667.7 -509.0 -45.0 s 68 163 787.9 509.0 40.0 46 -622.7 -509.0 -45.0 s 67 164 747.9 509.0 40.0 47 -577.7 -509.0 -45.0 s 66 165 707.9 509.0 40.0 t1 48 -532.7 -509.0 -45.0 s 65 166 606.9 509.0 101.0 49 -487.7 -509.0 -45.0 s 64 167 566.9 509.0 40.0 t2 50 -442.7 -509.0 -45.0 s 63 168 526.9 509.0 40.0 51 -397.7 -509.0 -45.0 s 62 169 486.9 509.0 40.0 t4 52 -352.7 -509.0 -45.0 s 61 170 446.9 509.0 40.0 53 -307.7 -509.0 -45.0 s 60 171 406.9 509.0 40.0 54 -262.7 -509.0 -45.0 s 59 172 366.9 509.0 40.0 osc 55 -217.7 -509.0 -45. 0 s58 173 326.9 509.0 40.0 56 -172.7 -509.0 -45.0 s 57 174 286.9 509.0 40.0 sa0 57 -127.7 -509.0 -45.0 s 56 175 246.9 509.0 40.0 58 -82.7 -509.0 -45.0 s 55 176 206.9 509.0 40.0 ifs 59 -37.7 -509.0 -45.0 s54 177 166.9 509.0 40.0 60 7.3 -509.0 -45.0 s53 178 126.9 509.0 40.0 vdd1 61 52.3 -509.0 -45.0 s52 179 86.9 509.0 40.0 62 97.3 -509.0 -45.0 s51 180 46.9 509.0 40.0 63 142.3 -509.0 -45.0 s50 181 6.9 509.0 40.0 64 187.3 -509.0 -45.0 s49 182 -33.1 509.0 40.0 65 232.3 -509.0 -45.0 s48 183 -73.1 509.0 40.0 table 43. bump locations of PCA8539DUG ?continued all x/y coordinates represent the position of the ce nter of each bump with respect to the center (x/y = 0) of the chip; see figure 49 symbol pin coordinates pitch symbol pin coordinates pitch x (m) y (m) x (m) x (m) y (m) x (m)
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 75 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver vdd2 66 277.3 -509.0 -45.0 s47 184 -113.1 509.0 40.0 67 322.3 -509.0 -45.0 s46 185 -153.1 509.0 40.0 68 367.3 -509.0 -45.0 s45 186 -193.1 509.0 40.0 69 412.3 -509.0 -45.0 s44 187 -233.1 509.0 40.0 70 457.3 -509.0 -45.0 s43 188 -273.1 509.0 40.0 71 502.3 -509.0 -45.0 s42 189 -313.1 509.0 40.0 72 547.3 -509.0 -45.0 s41 190 -353.1 509.0 40.0 73 592.3 -509.0 -45.0 s40 191 -393.1 509.0 40.0 pd 74 637.3 -509.0 -45.0 s39 192 -433.1 509.0 40.0 75 682.3 -509.0 -45.0 s38 193 -473.1 509.0 40.0 t3 76 727.3 -509.0 -45.0 s 37 194 -513.1 509.0 40.0 77 772.3 -509.0 -45.0 s36 195 -553.1 509.0 40.0 78 817.3 -509.0 -45.0 s35 196 -593.1 509.0 40.0 79 862.3 -509.0 -45.0 s34 197 -633.1 509.0 40.0 80 907.3 -509.0 -45.0 s33 198 -673.1 509.0 40.0 pwrout 81 952.3 -509.0 -45. 0 s32 199 -713.1 509.0 40.0 82 997.3 -509.0 -45.0 s31 200 -753.1 509.0 40.0 pwrin 83 1042.3 -509.0 -45. 0 s30 201 -793.1 509.0 40.0 84 1087.3 -509.0 -45.0 s29 202 -894.1 509.0 101.0 85 1132.3 -509.0 -45.0 s 28 203 -934.1 509.0 40.0 86 1177.3 -509.0 -45.0 s 27 204 -974.1 509.0 40.0 87 1222.3 -509.0 -45.0 s26 205 -1014.1 509.0 40.0 88 1267.3 -509.0 -45.0 s25 206 -1054.1 509.0 40.0 89 1312.3 -509.0 -45.0 s24 207 -1094.1 509.0 40.0 ce 90 1357.3 -509.0 -45.0 s23 208 -1134.1 509.0 40.0 91 1402.3 -509.0 -45.0 s22 209 -1174.1 509.0 40.0 clk 92 1447.3 -509.0 -45.0 s 21 210 -1214.1 509.0 40.0 93 1492.3 -509.0 -45.0 s20 211 -1254.1 509.0 40.0 94 1537.3 -509.0 -45.0 s19 212 -1294.1 509.0 40.0 rst 95 1582.3 -509.0 -45.0 s18 213 -1334.1 509.0 40.0 96 1627.3 -509.0 -45.0 s17 214 -1374.1 509.0 40.0 sdi/sdain 97 1672.3 -509.0 -45. 0 s16 215 -1414.1 509.0 40.0 98 1717.3 -509.0 -45.0 s15 216 -1454.1 509.0 40.0 99 1762.3 -509.0 -45.0 s14 217 -1494.1 509.0 40.0 sdo 100 1807.3 -509.0 -45.0 s 13 218 -1534.1 509.0 40.0 101 1852.3 -509.0 -45.0 s12 219 -1574.1 509.0 40.0 table 43. bump locations of PCA8539DUG ?continued all x/y coordinates represent the position of the ce nter of each bump with respect to the center (x/y = 0) of the chip; see figure 49 symbol pin coordinates pitch symbol pin coordinates pitch x (m) y (m) x (m) x (m) y (m) x (m)
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 76 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver scl 102 1897.3 -509.0 -45.0 s 11 220 -1614.1 509.0 40.0 103 1942.3 -509.0 -45.0 s10 221 -1654.1 509.0 40.0 104 1987.3 -509.0 -45.0 s9 222 -1694.1 509.0 40.0 sdaout 105 2032.3 -509.0 -45. 0 s8 223 -1734.1 509.0 40.0 106 2077.3 -509.0 -45.0 s7 224 -1774.1 509.0 40.0 107 2122.3 -509.0 -45.0 s6 225 -1814.1 509.0 40.0 108 2167.3 -509.0 -45.0 s5 226 -1854.1 509.0 40.0 109 2212.3 -509.0 -45.0 s4 227 -1894.1 509.0 40.0 com17 110 2320.9 -509.0 -108. 6 s3 228 -1934.1 509.0 40.0 111 2365.9 -509.0 -45.0 s2 229 -1974.1 509.0 40.0 com7 112 2410.9 -509.0 -45. 0 s1 230 -2014.1 509.0 40.0 113 2455.9 -509.0 -45.0 s 0 231 -2054.1 509.0 40.0 com6 114 2500.9 -509.0 -45.0 c om16 232 -2160.2 509.0 106.1 115 2545.9 -509.0 -45.0 233 -2205.2 509.0 45.0 com5 116 2590.9 -509.0 -45.0 c om8 234 -2250.2 509.0 45.0 117 2635.9 -509.0 -45.0 235 -2295.2 509.0 45.0 118 2680.9 -509.0 -45.0 com 9 236 -2340.2 509.0 45.0 - - - - - 237 -2385.2 509.0 45.0 - - - - - com10 238 -2430.2 509.0 45.0 - - - - - 239 -2475.2 509.0 45.0 - - - - - com11 240 -2520.2 509.0 45.0 - - - - - 241 -2565.2 509.0 45.0 - - - - - com12 242 -2610.2 509.0 45.0 - - - - - 243 -2655.2 509.0 45.0 - - - - - 244 -2700.2 509.0 45.0 fig 50. alignment marks table 43. bump locations of PCA8539DUG ?continued all x/y coordinates represent the position of the ce nter of each bump with respect to the center (x/y = 0) of the chip; see figure 49 symbol pin coordinates pitch symbol pin coordinates pitch x (m) y (m) x (m) x (m) y (m) x (m) ddd 5() 5() & 6
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 77 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 17. handling information all input and output pins are protected ag ainst electrostatic discharge (esd) under normal handling. when handling metal-oxide semiconductor (mos) devices ensure that all normal precautions are taken as described in jesd625-a , iec 61340-5 or equivalent standards. table 44. alignment marking all x/y coordinates represent the position of the ref point (see figure 50 ) with respect to the center (x/y = 0) of the chip; see figure 49 . symbol size ( ? m) x ( ? m) y (? m) s1 90 ? 90 ? 2585.0 36.0 c1 90 ? 90 2522.0 36
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 78 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 18. packing information 18.1 packing information on the tray schematic drawing, not drawn to scale . top side view. for dimensions, see table 45 . tray has pockets on both, top side and bottom side. the ic is stored with the active side up. to get the active side down, turn the tray. fig 51. tray details of PCA8539DUG + ghwdlo< ghwdlo; < ; ( 0 1 2 / * ) ( ) -$ . 6(&7,21$$ % ' $ & $ 'lphqvlrqvlqpp ddd [ \ \ [ gl h
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 79 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver table 45. specification of 3 inch tray details tray details are shown in figure 51 . nominal values without production tolerances. tray details dimensions abcdef ghj kl mnounit 7.0 2.5 5.74 1.34 76.0 68.0 56.0 6 .75 10.0 62.5 4.2 2.6 3.2 0.48 mm number of pockets x direction y direction 926 the orientation of the ic in a pocket with active side up is indicated by t he position of pin 1 with respect to the chamfer on the upper left corner of the tray. fig 52. die alignment in the tray ddd slq
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 80 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 19. appendix 19.1 initialization code example in this section a code example is given that shows how the initialization of the pca8539 might look like (see section 8.2.1 ). the actual code may differ depending on the application and its purpose. i2cwritelength = 5; i2creadlength = 0; i2cmasterbuffer[0] = pca8539_addr; i2cmasterbuffer[1] = 0b10000000; // control byte i2cmasterbuffer[2] = 0x01; // initialize i2cmasterbuffer[3] = 0b10000000; // control byte i2cmasterbuffer[4] = 0x02; // otp refresh i2cengine(); delay_ms(10); i2cwritelength = 24; i2creadlength = 0; i2cmasterbuffer[0] = pca8539_addr; i2cmasterbuffer[1] = 0b10000000; // control byte i2cmasterbuffer[2] = 0x21; // enable clkout signal i2cmasterbuffer[3] = 0b10000000; // control byte i2cmasterbuffer[4] = 0x50; // set multiplex mode to 1:18 i2cmasterbuffer[5] = 0b11000000; // control byte i2cmasterbuffer[6] = 0x40; // set to frame inversion mode i2cmasterbuffer[7] = 0b11000000; // control byte i2cmasterbuffer[8] = 0x2a; // set entry mode. display address increments by 1 i2cmasterbuffer[9] = 0b11000000; // control byte i2cmasterbuffer[10] = 0x92; // set frame frequency to 210 hz i2cmasterbuffer[11] = 0b11000000; // control byte i2cmasterbuffer[12] = 0x04; // set display configuration: segment data l to r i2cmasterbuffer[13] = 0b11100000; // control byte i2cmasterbuffer[14] = 0xac; // set msb vlcd to 01100 i2cmasterbuffer[15] = 0b11100000; // control byte i2cmasterbuffer[16] = 0x9f; // set lsb vlcd to 1111. vlcd set to 10.2 v i2cmasterbuffer[17] = 0b11100000; // control byte i2cmasterbuffer[18] = 0x85; // enable charge pump and set to 3x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 81 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver i2cmasterbuffer[19] = 0b11100000; // control byte i2cmasterbuffer[20] = 0x05; // enable temperature compensation of vlcd. i2cmasterbuffer[21] = 0b11000000; // control byte i2cmasterbuffer[22] = 0x24; // enable display i2cmasterbuffer[23] = 0b10000000; // control byte i2cengine(); 19.2 lcd graphic driver selection [1] can be selected by command. table 46. selection of lcd graphic drivers type name max display resolution rows ? col. multiplex rates v dd1 (v) v dd2 (v) v lcd (v) f fr (hz) v lcd (v) charge pump v lcd (v) temperature compensat. t amb ( ?c) interface package aec- q100 PCA8539DUG 18 ? 100 1:12, 1:18 2.5 to 5.5 2.5 to 5.5 4 to 16 45 to 360 [1] yy ? 40 to 105 i 2 c, spi bare die y pcf8539dug 18 ? 100 1:12, 1:18 2.5 to 5.5 2.5 to 5.5 4 to 16 45 to 360 [1] yy ? 40 to 85 i 2 c, spi bare die n pcf8531u 34 ? 128 or 33 ? 128 plus 128 icons 1:17, 1:26, 1:34 1.8 to 5.5 2.5 to 4.5 4 to 9 66 y y ? 40 to 85 i 2 c bare die n pcf8811u 80 ? 128 or 79 ? 129 plus 128 icons 1:16 to 1:80 in steps of 8 2 to 3.3 1.8 to 3.3 3 to 9 30 to 60 [1] yy ? 40 to 85 i 2 c, spi, parallel bare die n
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 82 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 20. abbreviations table 47. abbreviations acronym description aec automotive electronics council crc cyclical redundancy check cog chip-on-glass dc direct current emc electromagnetic compatibility esd electrostatic discharge hbm human body model i 2 c inter-integrated circuit bus ic integrated circuit ito indium tin oxide lcd liquid crystal display lsb least significant bit mos metal-oxide semiconductor msb most significant bit mux multiplexer nc numeric code otp one time programmable rc resistance-capacitance ram random access memory rms root mean square scl serial clock line sda serial data line spi serial peripheral interface va vertical alignment xor exclusive or operator
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 83 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 21. references [1] an10170 ? design guidelines for cog modules with nxp monochrome lcd drivers [2] an10439 ? wafer level chip size package [3] an10706 ? handling bare die [4] an10853 ? esd and emc sensitivity of ic [5] an11267 ? emc and system level esd design guidelines for lcd drivers [6] iec 60134 ? rating systems for electronic tu bes and valves and analogous semiconductor devices [7] iec 61340-5 ? protection of electronic devices from electrostatic phenomena [8] jesd22-a114 ? electrostatic discharge (esd) sensitivity testing human body model (hbm) [9] jesd22-c101 ? field-induced charged-device model test method for electrostatic-discharge-withstand thresh olds of microelectronic components [10] jesd78 ? ic latch-up test [11] jesd625-a ? requirements for handling elec trostatic-discharge-sensitive (esds) devices [12] um10204 ? i 2 c-bus specification and user manual [13] um10569 ? store and transport requirements
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 84 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 22. revision history table 48. revision history document id release date data sheet status change notice supersedes pca8539 v.1 20131111 product data sheet - -
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 85 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 23. legal information 23.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 23.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 23.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use in automotive applications ? this nxp semiconductors product has been qualified for use in automotive applications. unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 86 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any licens e under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. bare die ? all die are tested on compliance with their related technical specifications as stated in this data sheet up to the point of wafer sawing and are handled in accordance with the nxp semiconductors storage and transportation conditions. if there are da ta sheet limits not guaranteed, these will be separately indicated in the data sheet. there are no post-packing tests performed on individual die or wafers. nxp semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. accordingly, nxp semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. it is the responsibility of the customer to test and qualify their application in which the die is used. all die sales are conditioned upon and subject to the customer entering into a written die sale agreement with nxp semiconductors through its legal department. 23.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 24. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 87 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 25. tables table 1. ordering information . . . . . . . . . . . . . . . . . . . . .3 table 2. ordering options . . . . . . . . . . . . . . . . . . . . . . . . .3 table 3. pin description of PCA8539DUG . . . . . . . . . . . .6 table 4. command execution sequence . . . . . . . . . . . . .8 table 5. commands of pca8539 . . . . . . . . . . . . . . . . . .8 table 6. initialize - initialize command bit description . . .9 table 7. clear_reset_flag - clear_reset_flag command bit description . . . . . . . . . . . . . . . . . . . . . . . . . .9 table 8. otp_refresh - otp_refresh command bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 table 9. clock_out_ctrl - clk pin input/output switch command bit description . . . . . . . . . . . . . . . . .10 table 10. read_reg_select - se lect registers for readout command bit description . . . . . . . . . . . . . . . . .10 table 11. read_status_reg - readout register command bit description . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 12. graphic_mode_cfg - graphic mode command bit description . . . . . . . . . . . . . . . . . . . . . . . . . .12 table 13. sel_mem_bank - ram access configuration command . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 table 14. set_mem_addr - memory address command bit description . . . . . . . . . . . . . . . . . . . . . . . . . .13 table 15. read_data - data read bit description . . . . . . .13 table 16. write_data - data write bit description . . . . . . .14 table 17. entry_mode_set - entry mode bit description .15 table 18. inversion_mode - inversion mode command bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 table 19. frame-frequency - frame frequency select command bit description . . . . . . . . . . . . . . . . .16 table 20. clock and frame frequency values . . . . . . . . .17 table 21. display_control - display control bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 table 22. display_config - display configuration bit description . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 table 23. charge_pump_ctrl - charge pump control command bit description . . . . . . . . . . . . . . . . .19 table 24. set_vlcd - set-v lcd command bit description19 table 25. temperature_ctrl - temperature measurement control command bit descripti on . . . . . . . . . . .20 table 26. tc_slope - v lcd temperature compensation slope command bit description . . . . . . . . . . . .21 table 27. reset state of pca8539 . . . . . . . . . . . . . . . . .22 table 28. temperature coefficients. . . . . . . . . . . . . . . . . .37 table 29. calculation of the temperature compensating factor vt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 table 30. bias levels as a functi on of multiplex rate . . . .38 table 31. display ram bitmap . . . . . . . . . . . . . . . . . . . .45 table 32. control byte description . . . . . . . . . . . . . . . . . .51 table 33. i 2 c slave address byte . . . . . . . . . . . . . . . . . . .54 table 34. r/w -bit description . . . . . . . . . . . . . . . . . . . . . .55 table 35. serial interface . . . . . . . . . . . . . . . . . . . . . . . . .57 table 36. subaddress byte definition . . . . . . . . . . . . . . . .57 table 37. limiting values . . . . . . . . . . . . . . . . . . . . . . . . .61 table 38. static characteristics . . . . . . . . . . . . . . . . . . . .62 table 39. general dynamic characteristics . . . . . . . . . . .68 table 40. i 2 c-bus timing characteristics . . . . . . . . . . . . .68 table 41. spi-bus characteristics . . . . . . . . . . . . . . . . . . 69 table 42. dimensions of PCA8539DUG . . . . . . . . . . . . 73 table 43. bump locations of PCA8539DUG . . . . . . . . . 73 table 44. alignment marking . . . . . . . . . . . . . . . . . . . . . . 77 table 45. specification of 3 inch tray details . . . . . . . . . . 79 table 46. selection of lcd graphic drivers . . . . . . . . . . 81 table 47. abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 82 table 48. revision history . . . . . . . . . . . . . . . . . . . . . . . . 84
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 88 of 90 nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 26. figures fig 1. block diagram of pca8539 . . . . . . . . . . . . . . . . . .4 fig 2. pin configuration for PCA8539DUG. . . . . . . . . . . .5 fig 3. illustration of the display configuration bit p. . . . .18 fig 4. recommended start-up sequence when using the internal charge pump and the internal clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 fig 5. recommended start-up sequence when using an externally supplied v lcd and the internal clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 fig 6. recommended start-up sequence when using the internal charge pump and an external clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 fig 7. recommended start-up sequence when using an externally supplied v lcd and an external clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 fig 8. recommended power-down sequence for minimum power-down current when using the internal charge pump and the internal clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 fig 9. recommended power-down sequence when using an externally supplied v lcd and the internal clock signal . . . . . . . . . . . . . . . . . . . . . . .27 fig 10. recommended power-down sequence when using the internal charge pump and an external clock signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 fig 11. recommended power-down sequence when using an externally supplied v lcd and an external clock signal . . . . . . . . . . . . . . . . . . . . . .28 fig 12. pca8539 connected to a dot-matrix lcd (multiplex drive mode 1:12) . . . . . . . . . . . . . . . . .29 fig 13. typical system c onfiguration if using the internal v lcd generation and i 2 c-bus . . . . . . . . .30 fig 14. typical system c onfiguration if using the external v lcd and spi-bus . . . . . . . . . . . . . . . . .30 fig 15. v lcd generation including temperature compensation . . . . . . . . . . . . . . . . . . . . . . . . . . .32 fig 16. v lcd programming of pca8539 (assuming vt[8:0] = 0h) . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 fig 17. v lcd with respect to i load at v dd2 = 2.5 v . . . . . .34 fig 18. v lcd with respect to i load at v dd2 = 5 v . . . . . . . .34 fig 19. v lcd with respect to i load at v dd2 = 5 v . . . . . . . .35 fig 20. temperature measurement block with digital temperature filter . . . . . . . . . . . . . . . . . . . . . . . . .36 fig 21. temperature measurement delay . . . . . . . . . . . .36 fig 22. example of segmented temperature coefficients.37 fig 23. electro-optical ch aracteristic: relative transmission curve of the liquid . . . . . . . . . . . . . .40 fig 24. waveforms for the 1:18 multiplex drive mode. 5 bias levels, character mode, frame inversion mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 fig 25. waveforms for the 1:12 multiplex drive mode, 5 bias levels, charac ter mode, r8 to r15 and r17 open, frame inversion mode . . . . . . . . .42 fig 26. ram access flowchart . . . . . . . . . . . . . . . . . . . . .43 fig 27. logic diagram of the crc8 generator . . . . . . . . .44 fig 28. checksum generation . . . . . . . . . . . . . . . . . . . . .44 fig 29. control byte format . . . . . . . . . . . . . . . . . . . . . . . 51 fig 30. sdaout and sdain configuration. . . . . . . . . . . 52 fig 31. bit transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 fig 32. definition of start and stop conditions . . . . . 53 fig 33. system configuration. . . . . . . . . . . . . . . . . . . . . . 53 fig 34. acknowledgement on the i 2 c-bus. . . . . . . . . . . . 54 fig 35. i 2 c-bus protocol write mode . . . . . . . . . . . . . . . . 55 fig 36. i 2 c-bus protocol read mode . . . . . . . . . . . . . . . . 56 fig 37. spi data transfer overview . . . . . . . . . . . . . . . . . 57 fig 38. spi-bus write example . . . . . . . . . . . . . . . . . . . . 58 fig 39. device protection diagram . . . . . . . . . . . . . . . . . 59 fig 40. typical i dd1 with respect to temperature . . . . . . . 65 fig 41. typical i dd2 with respect to temperature . . . . . . . 65 fig 42. typical i dd(lcd) with respect to temperature . . . . 66 fig 43. typical v lcd variation with respect to temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 fig 44. typical frame frequency variation with respect to temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . 67 fig 45. measurement temperature variation with respect to temperature . . . . . . . . . . . . . . . . . . . . 67 fig 46. driver timing waveforms . . . . . . . . . . . . . . . . . . . 69 fig 47. i 2 c-bus timing diagram . . . . . . . . . . . . . . . . . . . . 69 fig 48. spi-bus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 70 fig 49. bare die outline of pca8 539dug. . . . . . . . . . . . 72 fig 50. alignment marks . . . . . . . . . . . . . . . . . . . . . . . . . 76 fig 51. tray details of PCA8539DUG . . . . . . . . . . . . . . . 78 fig 52. die alignment in the tray . . . . . . . . . . . . . . . . . . . 79
pca8539 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 1 ? 11 november 2013 89 of 90 continued >> nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver 27. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 5 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 functional description . . . . . . . . . . . . . . . . . . . 8 8.1 commands of pca8539 . . . . . . . . . . . . . . . . . . 8 8.1.1 general control commands . . . . . . . . . . . . . . . 9 8.1.1.1 command: initialize . . . . . . . . . . . . . . . . . . . . . 9 8.1.1.2 command: clear_reset_flag. . . . . . . . . . . . . . . 9 8.1.1.3 command: otp_refresh . . . . . . . . . . . . . . . . . 9 8.1.1.4 command: clock_out_ctrl . . . . . . . . . . . . . . . 10 8.1.1.5 command: read_reg_select . . . . . . . . . . . . . 10 8.1.1.6 command: read_status_reg . . . . . . . . . . . . . 10 8.1.1.7 command: graphic_mode_cfg. . . . . . . . . . . . 12 8.1.1.8 command: sel_mem_bank . . . . . . . . . . . . . . 13 8.1.1.9 command: set_mem_addr . . . . . . . . . . . . . . 13 8.1.1.10 command: read_data . . . . . . . . . . . . . . . . . . 13 8.1.1.11 command: write_data . . . . . . . . . . . . . . . . . . 14 8.1.2 display control commands . . . . . . . . . . . . . . . 15 8.1.2.1 command: entry_mode_set . . . . . . . . . . . . . . 15 8.1.2.2 command: inversion_mode . . . . . . . . . . . . . . 15 8.1.2.3 command: frame_frequency . . . . . . . . . . . . . 16 8.1.2.4 command: displa y_control. . . . . . . . . . . . . . . 17 8.1.2.5 command: displa y_config . . . . . . . . . . . . . . . 18 8.1.3 charge pump and lcd bias control commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 8.1.3.1 command: charge_pump_ctrl . . . . . . . . . . . . 19 8.1.3.2 command: set_vlcd . . . . . . . . . . . . . . . . . . 19 8.1.4 temperature co mpensation control commands . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8.1.4.1 command: temperature_ctrl . . . . . . . . . . . . . 20 8.1.4.2 command: tc_slope . . . . . . . . . . . . . . . . . . . 21 8.2 start-up and shut-down. . . . . . . . . . . . . . . . . . 22 8.2.1 initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8.2.2 reset pin function . . . . . . . . . . . . . . . . . . . . . . 23 8.2.3 power-down pin function . . . . . . . . . . . . . . . . 23 8.2.4 recommended start-up sequences . . . . . . . . 23 8.2.5 recommended power-down sequences . . . . 26 8.3 possible display configurations . . . . . . . . . . . 29 8.4 lcd voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8.4.1 v lcd pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8.4.2 external v lcd supply . . . . . . . . . . . . . . . . . . . 31 8.4.3 internal v lcd generation . . . . . . . . . . . . . . . . 31 8.4.3.1 v lcd programming . . . . . . . . . . . . . . . . . . . . . 31 8.4.4 v lcd drive capability . . . . . . . . . . . . . . . . . . . 33 8.4.5 temperature measur ement and temperature compensation of v lcd . . . . . . . . . . . . . . . . . . 35 8.4.5.1 temperature readout . . . . . . . . . . . . . . . . . . . 35 8.4.5.2 temperature adjustment of the v lcd . . . . . . . 36 8.4.5.3 example calculation of v offset(lcd) . . . . . . . . . 38 8.4.6 lcd bias voltage generator . . . . . . . . . . . . . . 38 8.4.6.1 electro-optical performance . . . . . . . . . . . . . . 39 8.4.7 lcd drive mode waveforms. . . . . . . . . . . . . . 40 8.5 display ram and general-purpose ram . . . . 43 8.5.1 checksum . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 8.5.2 display ram and multiplex drive modes . . . . 44 8.5.2.1 display ram addressing . . . . . . . . . . . . . . . . 50 8.5.3 general-purpose ram . . . . . . . . . . . . . . . . . . 50 8.5.3.1 general-purpose ram addressing . . . . . . . . 50 9 bus interfaces . . . . . . . . . . . . . . . . . . . . . . . . . 51 9.1 control byte and register selection . . . . . . . . 51 9.2 i 2 c interface . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.2.1 bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.2.2 start and stop conditions. . . . . . . . . . . . . 53 9.2.3 system configuration . . . . . . . . . . . . . . . . . . . 53 9.2.4 acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 53 9.2.5 i 2 c-bus controller . . . . . . . . . . . . . . . . . . . . . . 54 9.2.6 input filters . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 9.2.7 i 2 c-bus slave address . . . . . . . . . . . . . . . . . . 54 9.2.8 i 2 c-bus protocol . . . . . . . . . . . . . . . . . . . . . . . 55 9.3 spi interface . . . . . . . . . . . . . . . . . . . . . . . . . 57 9.3.1 spi-bus data transfer . . . . . . . . . . . . . . . . . . . 57 10 internal circuitry . . . . . . . . . . . . . . . . . . . . . . . 59 11 safety notes. . . . . . . . . . . . . . . . . . . . . . . . . . . 60 12 limiting values . . . . . . . . . . . . . . . . . . . . . . . . 61 13 static characteristics . . . . . . . . . . . . . . . . . . . 62 14 dynamic characteristics. . . . . . . . . . . . . . . . . 68 14.1 general timing characteristics . . . . . . . . . . . . 68 14.2 i 2 c-bus timing characteristics . . . . . . . . . . . . 68 14.3 spi-bus timing characteristics . . . . . . . . . . . . 69 15 test information . . . . . . . . . . . . . . . . . . . . . . . 71 15.1 quality information . . . . . . . . . . . . . . . . . . . . . 71 16 bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 72 17 handling information . . . . . . . . . . . . . . . . . . . 77 18 packing information . . . . . . . . . . . . . . . . . . . . 78 18.1 packing information on th e tray . . . . . . . . . . . 78
nxp semiconductors pca8539 100 x 18 chip-on-glass automotive lcd dot matrix driver ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 11 november 2013 document identifier: pca8539 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19 appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 19.1 initialization code example . . . . . . . . . . . . . . . 80 19.2 lcd graphic driver selection. . . . . . . . . . . . . . 81 20 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 82 21 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 22 revision history . . . . . . . . . . . . . . . . . . . . . . . . 84 23 legal information. . . . . . . . . . . . . . . . . . . . . . . 85 23.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 85 23.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 23.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 23.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 86 24 contact information. . . . . . . . . . . . . . . . . . . . . 86 25 tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 26 figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 27 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

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